assert that PC was changed in callback-pc test

tests/regress/callback-pc.py

@@ -1,7 +1,7 @@
 #!/usr/bin/env python
 
 # reg_write() can't modify PC from within trace callbacks
-# Pull Request #4
+# issue #210
 
 from __future__ import print_function
 from unicorn import *
@@ -30,11 +30,7 @@ def hook_block(uc, address, size, user_data):
 
 class CallBackPCTest(regress.RegressTest):
 
-    def runTest(self):
-       self.instruction_trace_test()
-
-    # set up emulation
-    def instruction_trace_test(self):
+    def test_instruction_trace(self):
         try:
             # initialize emulator in ARM's Thumb mode
             mu = Uc(UC_ARCH_ARM, UC_MODE_THUMB)
@@ -51,14 +47,44 @@ class CallBackPCTest(regress.RegressTest):
             # tracing all instructions with customized callback
             mu.hook_add(UC_HOOK_CODE, hook_code, user_data=mu)
 
-            # tracing all basic blocks with customized callback
-            mu.hook_add(UC_HOOK_BLOCK, hook_block, user_data=mu)
+            # emulate one instruction
+            mu.emu_start(BASE_ADDRESS, BASE_ADDRESS + len(THUMB_CODE), count=1)
 
-            # emulate machine code in infinite time
-            mu.emu_start(BASE_ADDRESS, BASE_ADDRESS + len(THUMB_CODE))
+            # the instruction trace callback set PC to 0xffffffff, so at this
+            # point, the PC value should be 0xffffffff.
+            pc = mu.reg_read(UC_ARM_REG_PC)
+            self.assertEqual(pc, 0xffffffff, "PC not set to 0xffffffff by instruction trace callback")
 
         except UcError as e:
-            assertFalse(0, "ERROR: %s" % e)
+            self.assertFalse(0, "ERROR: %s" % e)
+
+    def test_block_trace(self):
+        try:
+            # initialize emulator in ARM's Thumb mode
+            mu = Uc(UC_ARCH_ARM, UC_MODE_THUMB)
+
+            # map some memory
+            mu.mem_map(BASE_ADDRESS, 2 * 1024 * 1024)
+
+            # write machine code to be emulated to memory
+            mu.mem_write(BASE_ADDRESS, THUMB_CODE)
+
+            # setup stack
+            mu.reg_write(UC_ARM_REG_SP, BASE_ADDRESS + 2 * 1024 * 1024)
+
+            # trace blocks with customized callback
+            mu.hook_add(UC_HOOK_BLOCK, hook_block, user_data=mu)
+
+            # emulate one instruction
+            mu.emu_start(BASE_ADDRESS, BASE_ADDRESS + len(THUMB_CODE), count=1)
+
+            # the block callback set PC to 0xffffffff, so at this point, the PC
+            # value should be 0xffffffff.
+            pc = mu.reg_read(UC_ARM_REG_PC)
+            self.assertEqual(pc, 0xffffffff, "PC not set to 0xffffffff by block callback")
+
+        except UcError as e:
+            self.assertFalse(0, "ERROR: %s" % e)
 
 if __name__ == '__main__':
     regress.main()