diff --git a/include/unicorn/arm64.h b/include/unicorn/arm64.h
index 933be479..aab2ab9c 100644
--- a/include/unicorn/arm64.h
+++ b/include/unicorn/arm64.h
@@ -313,6 +313,10 @@ typedef enum uc_arm64_reg {
 
     UC_ARM64_REG_PSTATE,
 
+    //> floating point control and status registers
+    UC_ARM64_REG_FPCR,
+    UC_ARM64_REG_FPSR,
+
     //> exception link registers, depreciated, use UC_ARM64_REG_CP_REG instead
     UC_ARM64_REG_ELR_EL0,
     UC_ARM64_REG_ELR_EL1,
diff --git a/qemu/target/arm/unicorn_aarch64.c b/qemu/target/arm/unicorn_aarch64.c
index f24c9506..4b533047 100644
--- a/qemu/target/arm/unicorn_aarch64.c
+++ b/qemu/target/arm/unicorn_aarch64.c
@@ -210,6 +210,12 @@ static uc_err reg_read(CPUARMState *env, unsigned int regid, void *value)
         case UC_ARM64_REG_PSTATE:
             *(uint32_t *)value = pstate_read(env);
             break;
+        case UC_ARM64_REG_FPCR:
+            *(uint32_t *)value = vfp_get_fpcr(env);
+            break;
+        case UC_ARM64_REG_FPSR:
+            *(uint32_t *)value = vfp_get_fpsr(env);
+            break;
         case UC_ARM64_REG_TTBR0_EL1:
             *(uint64_t *)value = env->cp15.ttbr0_el[1];
             break;
@@ -303,6 +309,12 @@ static uc_err reg_write(CPUARMState *env, unsigned int regid, const void *value)
         case UC_ARM64_REG_PSTATE:
             pstate_write(env, *(uint32_t *)value);
             break;
+        case UC_ARM64_REG_FPCR:
+            vfp_set_fpcr(env, *(uint32_t *)value);
+            break;
+        case UC_ARM64_REG_FPSR:
+            vfp_set_fpsr(env, *(uint32_t *)value);
+            break;
         case UC_ARM64_REG_TTBR0_EL1:
             env->cp15.ttbr0_el[1] = *(uint64_t *)value;
             break;