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Fixed warnings.

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This commit is contained in:
Simon Gorchakov 2020-05-25 23:28:25 +03:00
parent e55b25c744
commit 0e8b6a8bba
5 changed files with 14 additions and 3 deletions
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2
include/unicorn/unicorn.h
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@ -93,7 +93,7 @@ typedef enum uc_arch {
UC_ARCH_ARM64, // ARM-64, also called AArch64
UC_ARCH_MIPS, // Mips architecture
UC_ARCH_X86, // X86 architecture (including x86 & x86-64)
UC_ARCH_PPC, // PowerPC architecture (currently unsupported)
UC_ARCH_PPC, // PowerPC architecture
UC_ARCH_SPARC, // Sparc architecture
UC_ARCH_M68K, // M68K architecture
UC_ARCH_MAX,

2
qemu/hw/ppc/e500plat.c
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@ -13,8 +13,8 @@
#include "qemu-common.h"
#include "e500.h"
#include "hw/boards.h"
#include "hw/ppc/ppc.h"
//#include "sysemu/device_tree.h"
//#include "hw/pci/pci.h"
//#include "hw/ppc/openpic.h"
//#include "kvm_ppc.h"

2
qemu/include/hw/ppc/ppc.h
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@ -101,4 +101,6 @@ enum {
/* ppc_booke.c */
void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags);
void ppc_machine_init(struct uc_struct *uc);
void ppc_cpu_register_types(void *opaque);
#endif

6
qemu/target-ppc/translate.c
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@ -33,6 +33,8 @@
#define CPU_BRANCH_STEP 0x2
#define GDBSTUB_SINGLE_STEP 0x4
void gen_update_current_nip(void *opaque);
/* Include definitions for instructions classes and implementations flags */
//#define PPC_DEBUG_DISAS
//#define DO_PPC_STATISTICS
@ -11063,6 +11065,7 @@ GEN_SPEOP_LDST(evstwwo, 0x1E, 2),
/*****************************************************************************/
/* Misc PowerPC helpers */
#if 0
void ppc_cpu_dump_state(struct uc_struct *uc, CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
@ -11217,6 +11220,7 @@ void ppc_cpu_dump_state(struct uc_struct *uc, CPUState *cs, FILE *f, fprintf_fun
#undef RFPL
}
void ppc_cpu_dump_statistics(CPUState *cs, FILE*f,
fprintf_function cpu_fprintf, int flags)
{
@ -11264,7 +11268,7 @@ void ppc_cpu_dump_statistics(CPUState *cs, FILE*f,
}
#endif
}
#endif // #if 0
/*****************************************************************************/
static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
TranslationBlock *tb,

5
qemu/target-ppc/translate_init.c
View File

@ -43,6 +43,8 @@
//#define PPC_DUMP_SPR_ACCESSES
/* #define USE_APPLE_GDB */
void ppc_cpu_register_types(void *opaque);
/* For user-mode emulation, we don't emulate any IRQ controller */
#if defined(CONFIG_USER_ONLY)
#define PPC_IRQ_INIT_FN(name) \
@ -3285,6 +3287,7 @@ static bool ppc_cpu_interrupts_big_endian_lpcr(PowerPCCPU *cpu)
.class_init = glue(glue(ppc_, _name), _cpu_family_class_init), \
}; \
\
void glue(glue(ppc_, _name), _cpu_family_register_types)(struct uc_struct *uc); \
/*static*/ void glue(glue(ppc_, _name), _cpu_family_register_types)(struct uc_struct *uc) \
{ \
type_register_static(uc, \
@ -9936,6 +9939,8 @@ static void ppc_cpu_class_init(struct uc_struct *uc, ObjectClass *oc, void *data
type_register_static(uc, &ppc_cpu_type_info);
}
*/
void CPU_POWERPC_e500v2_v10_0x40000000_e500v2_cpu_register_types(void *opaque);
void ppc_cpu_register_types(void *opaque)
{
TypeInfo ppc_cpu_type_info = { 0 };