From 403237206ec16e18cc7b6c8662f101354e3ff49a Mon Sep 17 00:00:00 2001 From: Stephen Date: Sat, 11 Mar 2017 18:04:27 -0800 Subject: [PATCH 01/11] add trusty builds (#777) * add trusty builds * Update .travis.yml * remove bad apt addon attempt --- .travis.yml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/.travis.yml b/.travis.yml index 44bb8acf..fec811f0 100644 --- a/.travis.yml +++ b/.travis.yml @@ -12,6 +12,14 @@ compiler: os: - linux - osx +matrix: + include: + - os: linux + dist: trusty + compiler: gcc + - os: linux + dist: trusty + compiler: clang addons: apt: packages: From b19daa77e82137e659c7238e28dd8332cc0d7d5a Mon Sep 17 00:00:00 2001 From: Stephen Date: Sat, 11 Mar 2017 19:11:06 -0800 Subject: [PATCH 02/11] Homebrew (#778) * add homebrew build * update command and fix compiler * allow failures on brew HEAD builds mainly there to monitor --- .travis.yml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/.travis.yml b/.travis.yml index fec811f0..b0b4af9b 100644 --- a/.travis.yml +++ b/.travis.yml @@ -20,6 +20,15 @@ matrix: - os: linux dist: trusty compiler: clang + - os: osx + script: brew install --HEAD unicorn + compiler: gcc + - os: osx + script: brew install --HEAD unicorn + compiler: clang + allow_failures: + - os: osx + script: brew install --HEAD unicorn addons: apt: packages: From ee89c4a42116aef84576fc84bef24a644af044ba Mon Sep 17 00:00:00 2001 From: Stephen Date: Sun, 12 Mar 2017 06:31:49 -0700 Subject: [PATCH 03/11] add brew tests (#779) --- .travis.yml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/.travis.yml b/.travis.yml index b0b4af9b..b8f27d3c 100644 --- a/.travis.yml +++ b/.travis.yml @@ -21,14 +21,14 @@ matrix: dist: trusty compiler: clang - os: osx - script: brew install --HEAD unicorn + script: brew install --HEAD unicorn && brew test unicorn compiler: gcc - os: osx - script: brew install --HEAD unicorn + script: brew install --HEAD unicorn && brew test unicorn compiler: clang allow_failures: - os: osx - script: brew install --HEAD unicorn + script: brew install --HEAD unicorn && brew test unicorn addons: apt: packages: From d8fe34a2e86758276209cd9c36a101245725d779 Mon Sep 17 00:00:00 2001 From: zhangwm Date: Mon, 13 Mar 2017 22:32:44 +0800 Subject: [PATCH 04/11] armeb: Add support for ARM big endian. --- Makefile | 5 +- bindings/python/sample_armeb.py | 105 + include/uc_priv.h | 2 +- qemu/armeb.h | 3020 ++++++++++++++++++++++++ qemu/default-configs/armeb-softmmu.mak | 0 qemu/target-arm/unicorn.h | 1 + qemu/target-arm/unicorn_arm.c | 7 +- samples/Makefile | 1 + uc.c | 9 +- 9 files changed, 3144 insertions(+), 6 deletions(-) create mode 100755 bindings/python/sample_armeb.py create mode 100644 qemu/armeb.h create mode 100644 qemu/default-configs/armeb-softmmu.mak diff --git a/Makefile b/Makefile index fa458470..c149e58f 100644 --- a/Makefile +++ b/Makefile @@ -26,8 +26,11 @@ ifneq (,$(findstring x86,$(UNICORN_ARCHS))) endif ifneq (,$(findstring arm,$(UNICORN_ARCHS))) UC_TARGET_OBJ += $(call GENOBJ,arm-softmmu) + UC_TARGET_OBJ += $(call GENOBJ,armeb-softmmu) UNICORN_CFLAGS += -DUNICORN_HAS_ARM + UNICORN_CFLAGS += -DUNICORN_HAS_ARMEB UNICORN_TARGETS += arm-softmmu, + UNICORN_TARGETS += armeb-softmmu, endif ifneq (,$(findstring m68k,$(UNICORN_ARCHS))) UC_TARGET_OBJ += $(call GENOBJ,m68k-softmmu) @@ -297,7 +300,7 @@ dist: # run "make header" whenever qemu/header_gen.py is modified header: - $(eval TARGETS := m68k arm aarch64 mips mipsel mips64 mips64el\ + $(eval TARGETS := m68k arm armeb aarch64 mips mipsel mips64 mips64el\ powerpc sparc sparc64 x86_64) $(foreach var,$(TARGETS),\ $(shell python qemu/header_gen.py $(var) > qemu/$(var).h;)) diff --git a/bindings/python/sample_armeb.py b/bindings/python/sample_armeb.py new file mode 100755 index 00000000..97848830 --- /dev/null +++ b/bindings/python/sample_armeb.py @@ -0,0 +1,105 @@ +#!/usr/bin/env python +# Sample code for ARM of Unicorn. Nguyen Anh Quynh +# Python sample ported by Loi Anh Tuan + +from __future__ import print_function +from unicorn import * +from unicorn.arm_const import * + + +# code to be emulated +ARM_CODE = b"\xe3\xa0\x00\x37\xe0\x42\x10\x03" # mov r0, #0x37; sub r1, r2, r3 +THUMB_CODE = b"\xb0\x83" # sub sp, #0xc +# memory address where emulation starts +ADDRESS = 0x10000 + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = 0x%x" %(address, size)) + + +# Test ARM +def test_arm(): + print("Emulate ARM code") + try: + # Initialize emulator in ARM mode + mu = Uc(UC_ARCH_ARM, UC_MODE_ARM | UC_MODE_BIG_ENDIAN) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, ARM_CODE) + + # initialize machine registers + mu.reg_write(UC_ARM_REG_R0, 0x1234) + mu.reg_write(UC_ARM_REG_R2, 0x6789) + mu.reg_write(UC_ARM_REG_R3, 0x3333) + mu.reg_write(UC_ARM_REG_APSR, 0xFFFFFFFF) #All application flags turned on + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing one instruction at ADDRESS with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code, begin=ADDRESS, end=ADDRESS) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(ARM_CODE)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r0 = mu.reg_read(UC_ARM_REG_R0) + r1 = mu.reg_read(UC_ARM_REG_R1) + print(">>> R0 = 0x%x" %r0) + print(">>> R1 = 0x%x" %r1) + + except UcError as e: + print("ERROR: %s" % e) + + +def test_thumb(): + print("Emulate THUMB code") + try: + # Initialize emulator in thumb mode + mu = Uc(UC_ARCH_ARM, UC_MODE_THUMB | UC_MODE_BIG_ENDIAN) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, THUMB_CODE) + + # initialize machine registers + mu.reg_write(UC_ARM_REG_SP, 0x1234) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + # Note we start at ADDRESS | 1 to indicate THUMB mode. + mu.emu_start(ADDRESS | 1, ADDRESS + len(THUMB_CODE)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + sp = mu.reg_read(UC_ARM_REG_SP) + print(">>> SP = 0x%x" %sp) + + except UcError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_arm() + print("=" * 26) + test_thumb() diff --git a/include/uc_priv.h b/include/uc_priv.h index 009c2e58..4a5311a3 100644 --- a/include/uc_priv.h +++ b/include/uc_priv.h @@ -13,7 +13,7 @@ // These are masks of supported modes for each cpu/arch. // They should be updated when changes are made to the uc_mode enum typedef. -#define UC_MODE_ARM_MASK (UC_MODE_ARM|UC_MODE_THUMB|UC_MODE_LITTLE_ENDIAN|UC_MODE_MCLASS) +#define UC_MODE_ARM_MASK (UC_MODE_ARM|UC_MODE_THUMB|UC_MODE_LITTLE_ENDIAN|UC_MODE_MCLASS|UC_MODE_BIG_ENDIAN) #define UC_MODE_MIPS_MASK (UC_MODE_MIPS32|UC_MODE_MIPS64|UC_MODE_LITTLE_ENDIAN|UC_MODE_BIG_ENDIAN) #define UC_MODE_X86_MASK (UC_MODE_16|UC_MODE_32|UC_MODE_64|UC_MODE_LITTLE_ENDIAN) #define UC_MODE_PPC_MASK (UC_MODE_PPC64|UC_MODE_BIG_ENDIAN) diff --git a/qemu/armeb.h b/qemu/armeb.h new file mode 100644 index 00000000..2c846ce6 --- /dev/null +++ b/qemu/armeb.h @@ -0,0 +1,3020 @@ +/* Autogen header for Unicorn Engine - DONOT MODIFY */ +#ifndef UNICORN_AUTOGEN_ARM_H +#define UNICORN_AUTOGEN_ARM_H +#define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_armeb +#define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_armeb +#define use_idiv_instructions_rt use_idiv_instructions_rt_armeb +#define tcg_target_deposit_valid tcg_target_deposit_valid_armeb +#define helper_power_down helper_power_down_armeb +#define check_exit_request check_exit_request_armeb +#define address_space_unregister address_space_unregister_armeb +#define tb_invalidate_phys_page_fast tb_invalidate_phys_page_fast_armeb +#define phys_mem_clean phys_mem_clean_armeb +#define tb_cleanup tb_cleanup_armeb +#define memory_map memory_map_armeb +#define memory_map_ptr memory_map_ptr_armeb +#define memory_unmap memory_unmap_armeb +#define memory_free memory_free_armeb +#define free_code_gen_buffer free_code_gen_buffer_armeb +#define helper_raise_exception helper_raise_exception_armeb +#define tcg_enabled tcg_enabled_armeb +#define tcg_exec_init tcg_exec_init_armeb +#define memory_register_types memory_register_types_armeb +#define cpu_exec_init_all cpu_exec_init_all_armeb +#define vm_start vm_start_armeb +#define resume_all_vcpus resume_all_vcpus_armeb +#define a15_l2ctlr_read a15_l2ctlr_read_armeb +#define a64_translate_init a64_translate_init_armeb +#define aa32_generate_debug_exceptions aa32_generate_debug_exceptions_armeb +#define aa64_cacheop_access aa64_cacheop_access_armeb +#define aa64_daif_access aa64_daif_access_armeb +#define aa64_daif_write aa64_daif_write_armeb +#define aa64_dczid_read aa64_dczid_read_armeb +#define aa64_fpcr_read aa64_fpcr_read_armeb +#define aa64_fpcr_write aa64_fpcr_write_armeb +#define aa64_fpsr_read aa64_fpsr_read_armeb +#define aa64_fpsr_write aa64_fpsr_write_armeb +#define aa64_generate_debug_exceptions aa64_generate_debug_exceptions_armeb +#define aa64_zva_access aa64_zva_access_armeb +#define aarch64_banked_spsr_index aarch64_banked_spsr_index_armeb +#define aarch64_restore_sp aarch64_restore_sp_armeb +#define aarch64_save_sp aarch64_save_sp_armeb +#define accel_find accel_find_armeb +#define accel_init_machine accel_init_machine_armeb +#define accel_type accel_type_armeb +#define access_with_adjusted_size access_with_adjusted_size_armeb +#define add128 add128_armeb +#define add16_sat add16_sat_armeb +#define add16_usat add16_usat_armeb +#define add192 add192_armeb +#define add8_sat add8_sat_armeb +#define add8_usat add8_usat_armeb +#define add_cpreg_to_hashtable add_cpreg_to_hashtable_armeb +#define add_cpreg_to_list add_cpreg_to_list_armeb +#define addFloat128Sigs addFloat128Sigs_armeb +#define addFloat32Sigs addFloat32Sigs_armeb +#define addFloat64Sigs addFloat64Sigs_armeb +#define addFloatx80Sigs addFloatx80Sigs_armeb +#define add_qemu_ldst_label add_qemu_ldst_label_armeb +#define address_space_access_valid address_space_access_valid_armeb +#define address_space_destroy address_space_destroy_armeb +#define address_space_destroy_dispatch address_space_destroy_dispatch_armeb +#define address_space_get_flatview address_space_get_flatview_armeb +#define address_space_init address_space_init_armeb +#define address_space_init_dispatch address_space_init_dispatch_armeb +#define address_space_lookup_region address_space_lookup_region_armeb +#define address_space_map address_space_map_armeb +#define address_space_read address_space_read_armeb +#define address_space_rw address_space_rw_armeb +#define address_space_translate address_space_translate_armeb +#define address_space_translate_for_iotlb address_space_translate_for_iotlb_armeb +#define address_space_translate_internal address_space_translate_internal_armeb +#define address_space_unmap address_space_unmap_armeb +#define address_space_update_topology address_space_update_topology_armeb +#define address_space_update_topology_pass address_space_update_topology_pass_armeb +#define address_space_write address_space_write_armeb +#define addrrange_contains addrrange_contains_armeb +#define addrrange_end addrrange_end_armeb +#define addrrange_equal addrrange_equal_armeb +#define addrrange_intersection addrrange_intersection_armeb +#define addrrange_intersects addrrange_intersects_armeb +#define addrrange_make addrrange_make_armeb +#define adjust_endianness adjust_endianness_armeb +#define all_helpers all_helpers_armeb +#define alloc_code_gen_buffer alloc_code_gen_buffer_armeb +#define alloc_entry alloc_entry_armeb +#define always_true always_true_armeb +#define armeb1026_initfn armeb1026_initfn_armeb +#define armeb1136_initfn armeb1136_initfn_armeb +#define armeb1136_r2_initfn armeb1136_r2_initfn_armeb +#define armeb1176_initfn armeb1176_initfn_armeb +#define armeb11mpcore_initfn armeb11mpcore_initfn_armeb +#define armeb926_initfn armeb926_initfn_armeb +#define armeb946_initfn armeb946_initfn_armeb +#define armeb_ccnt_enabled armeb_ccnt_enabled_armeb +#define armeb_cp_read_zero armeb_cp_read_zero_armeb +#define armeb_cp_reset_ignore armeb_cp_reset_ignore_armeb +#define armeb_cpu_do_interrupt armeb_cpu_do_interrupt_armeb +#define armeb_cpu_exec_interrupt armeb_cpu_exec_interrupt_armeb +#define armeb_cpu_finalizefn armeb_cpu_finalizefn_armeb +#define armeb_cpu_get_phys_page_debug armeb_cpu_get_phys_page_debug_armeb +#define armeb_cpu_handle_mmu_fault armeb_cpu_handle_mmu_fault_armeb +#define armeb_cpu_initfn armeb_cpu_initfn_armeb +#define armeb_cpu_list armeb_cpu_list_armeb +#define cpu_loop_exit cpu_loop_exit_armeb +#define armeb_cpu_post_init armeb_cpu_post_init_armeb +#define armeb_cpu_realizefn armeb_cpu_realizefn_armeb +#define armeb_cpu_register_gdb_regs_for_features armeb_cpu_register_gdb_regs_for_features_armeb +#define armeb_cpu_register_types armeb_cpu_register_types_armeb +#define cpu_resume_from_signal cpu_resume_from_signal_armeb +#define armeb_cpus armeb_cpus_armeb +#define armeb_cpu_set_pc armeb_cpu_set_pc_armeb +#define armeb_cp_write_ignore armeb_cp_write_ignore_armeb +#define armeb_current_el armeb_current_el_armeb +#define armeb_dc_feature armeb_dc_feature_armeb +#define armeb_debug_excp_handler armeb_debug_excp_handler_armeb +#define armeb_debug_target_el armeb_debug_target_el_armeb +#define armeb_el_is_aa64 armeb_el_is_aa64_armeb +#define armeb_env_get_cpu armeb_env_get_cpu_armeb +#define armeb_excp_target_el armeb_excp_target_el_armeb +#define armeb_excp_unmasked armeb_excp_unmasked_armeb +#define armeb_feature armeb_feature_armeb +#define armeb_generate_debug_exceptions armeb_generate_debug_exceptions_armeb +#define gen_intermediate_code gen_intermediate_code_armeb +#define gen_intermediate_code_pc gen_intermediate_code_pc_armeb +#define armeb_gen_test_cc armeb_gen_test_cc_armeb +#define armeb_gt_ptimer_cb armeb_gt_ptimer_cb_armeb +#define armeb_gt_vtimer_cb armeb_gt_vtimer_cb_armeb +#define armeb_handle_psci_call armeb_handle_psci_call_armeb +#define armeb_is_psci_call armeb_is_psci_call_armeb +#define armeb_is_secure armeb_is_secure_armeb +#define armeb_is_secure_below_el3 armeb_is_secure_below_el3_armeb +#define armeb_ldl_code armeb_ldl_code_armeb +#define armeb_lduw_code armeb_lduw_code_armeb +#define armeb_log_exception armeb_log_exception_armeb +#define armeb_reg_read armeb_reg_read_armeb +#define armeb_reg_reset armeb_reg_reset_armeb +#define armeb_reg_write armeb_reg_write_armeb +#define restore_state_to_opc restore_state_to_opc_armeb +#define armeb_rmode_to_sf armeb_rmode_to_sf_armeb +#define armeb_singlestep_active armeb_singlestep_active_armeb +#define tlb_fill tlb_fill_armeb +#define tlb_flush tlb_flush_armeb +#define tlb_flush_page tlb_flush_page_armeb +#define tlb_set_page tlb_set_page_armeb +#define armeb_translate_init armeb_translate_init_armeb +#define armeb_v7m_class_init armeb_v7m_class_init_armeb +#define armeb_v7m_cpu_do_interrupt armeb_v7m_cpu_do_interrupt_armeb +#define ats_access ats_access_armeb +#define ats_write ats_write_armeb +#define bad_mode_switch bad_mode_switch_armeb +#define bank_number bank_number_armeb +#define bitmap_zero_extend bitmap_zero_extend_armeb +#define bp_wp_matches bp_wp_matches_armeb +#define breakpoint_invalidate breakpoint_invalidate_armeb +#define build_page_bitmap build_page_bitmap_armeb +#define bus_add_child bus_add_child_armeb +#define bus_class_init bus_class_init_armeb +#define bus_info bus_info_armeb +#define bus_unparent bus_unparent_armeb +#define cache_block_ops_cp_reginfo cache_block_ops_cp_reginfo_armeb +#define cache_dirty_status_cp_reginfo cache_dirty_status_cp_reginfo_armeb +#define cache_test_clean_cp_reginfo cache_test_clean_cp_reginfo_armeb +#define call_recip_estimate call_recip_estimate_armeb +#define can_merge can_merge_armeb +#define capacity_increase capacity_increase_armeb +#define ccsidr_read ccsidr_read_armeb +#define check_ap check_ap_armeb +#define check_breakpoints check_breakpoints_armeb +#define check_watchpoints check_watchpoints_armeb +#define cho cho_armeb +#define clear_bit clear_bit_armeb +#define clz32 clz32_armeb +#define clz64 clz64_armeb +#define cmp_flatrange_addr cmp_flatrange_addr_armeb +#define code_gen_alloc code_gen_alloc_armeb +#define commonNaNToFloat128 commonNaNToFloat128_armeb +#define commonNaNToFloat16 commonNaNToFloat16_armeb +#define commonNaNToFloat32 commonNaNToFloat32_armeb +#define commonNaNToFloat64 commonNaNToFloat64_armeb +#define commonNaNToFloatx80 commonNaNToFloatx80_armeb +#define compute_abs_deadline compute_abs_deadline_armeb +#define cond_name cond_name_armeb +#define configure_accelerator configure_accelerator_armeb +#define container_get container_get_armeb +#define container_info container_info_armeb +#define container_register_types container_register_types_armeb +#define contextidr_write contextidr_write_armeb +#define core_log_global_start core_log_global_start_armeb +#define core_log_global_stop core_log_global_stop_armeb +#define core_memory_listener core_memory_listener_armeb +#define cortexa15_cp_reginfo cortexa15_cp_reginfo_armeb +#define cortex_a15_initfn cortex_a15_initfn_armeb +#define cortexa8_cp_reginfo cortexa8_cp_reginfo_armeb +#define cortex_a8_initfn cortex_a8_initfn_armeb +#define cortexa9_cp_reginfo cortexa9_cp_reginfo_armeb +#define cortex_a9_initfn cortex_a9_initfn_armeb +#define cortex_m3_initfn cortex_m3_initfn_armeb +#define count_cpreg count_cpreg_armeb +#define countLeadingZeros32 countLeadingZeros32_armeb +#define countLeadingZeros64 countLeadingZeros64_armeb +#define cp_access_ok cp_access_ok_armeb +#define cpacr_write cpacr_write_armeb +#define cpreg_field_is_64bit cpreg_field_is_64bit_armeb +#define cp_reginfo cp_reginfo_armeb +#define cpreg_key_compare cpreg_key_compare_armeb +#define cpreg_make_keylist cpreg_make_keylist_armeb +#define cp_reg_reset cp_reg_reset_armeb +#define cpreg_to_kvm_id cpreg_to_kvm_id_armeb +#define cpsr_read cpsr_read_armeb +#define cpsr_write cpsr_write_armeb +#define cptype_valid cptype_valid_armeb +#define cpu_abort cpu_abort_armeb +#define cpu_armeb_exec cpu_armeb_exec_armeb +#define cpu_armeb_gen_code cpu_armeb_gen_code_armeb +#define cpu_armeb_init cpu_armeb_init_armeb +#define cpu_breakpoint_insert cpu_breakpoint_insert_armeb +#define cpu_breakpoint_remove cpu_breakpoint_remove_armeb +#define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_armeb +#define cpu_breakpoint_remove_by_ref cpu_breakpoint_remove_by_ref_armeb +#define cpu_can_do_io cpu_can_do_io_armeb +#define cpu_can_run cpu_can_run_armeb +#define cpu_class_init cpu_class_init_armeb +#define cpu_common_class_by_name cpu_common_class_by_name_armeb +#define cpu_common_exec_interrupt cpu_common_exec_interrupt_armeb +#define cpu_common_get_arch_id cpu_common_get_arch_id_armeb +#define cpu_common_get_memory_mapping cpu_common_get_memory_mapping_armeb +#define cpu_common_get_paging_enabled cpu_common_get_paging_enabled_armeb +#define cpu_common_has_work cpu_common_has_work_armeb +#define cpu_common_initfn cpu_common_initfn_armeb +#define cpu_common_noop cpu_common_noop_armeb +#define cpu_common_parse_features cpu_common_parse_features_armeb +#define cpu_common_realizefn cpu_common_realizefn_armeb +#define cpu_common_reset cpu_common_reset_armeb +#define cpu_dump_statistics cpu_dump_statistics_armeb +#define cpu_exec_init cpu_exec_init_armeb +#define cpu_flush_icache_range cpu_flush_icache_range_armeb +#define cpu_gen_init cpu_gen_init_armeb +#define cpu_get_clock cpu_get_clock_armeb +#define cpu_get_real_ticks cpu_get_real_ticks_armeb +#define cpu_get_tb_cpu_state cpu_get_tb_cpu_state_armeb +#define cpu_handle_debug_exception cpu_handle_debug_exception_armeb +#define cpu_handle_guest_debug cpu_handle_guest_debug_armeb +#define cpu_inb cpu_inb_armeb +#define cpu_inl cpu_inl_armeb +#define cpu_interrupt cpu_interrupt_armeb +#define cpu_interrupt_handler cpu_interrupt_handler_armeb +#define cpu_inw cpu_inw_armeb +#define cpu_io_recompile cpu_io_recompile_armeb +#define cpu_is_stopped cpu_is_stopped_armeb +#define cpu_ldl_code cpu_ldl_code_armeb +#define cpu_ldub_code cpu_ldub_code_armeb +#define cpu_lduw_code cpu_lduw_code_armeb +#define cpu_memory_rw_debug cpu_memory_rw_debug_armeb +#define cpu_mmu_index cpu_mmu_index_armeb +#define cpu_outb cpu_outb_armeb +#define cpu_outl cpu_outl_armeb +#define cpu_outw cpu_outw_armeb +#define cpu_physical_memory_clear_dirty_range cpu_physical_memory_clear_dirty_range_armeb +#define cpu_physical_memory_get_clean cpu_physical_memory_get_clean_armeb +#define cpu_physical_memory_get_dirty cpu_physical_memory_get_dirty_armeb +#define cpu_physical_memory_get_dirty_flag cpu_physical_memory_get_dirty_flag_armeb +#define cpu_physical_memory_is_clean cpu_physical_memory_is_clean_armeb +#define cpu_physical_memory_is_io cpu_physical_memory_is_io_armeb +#define cpu_physical_memory_map cpu_physical_memory_map_armeb +#define cpu_physical_memory_range_includes_clean cpu_physical_memory_range_includes_clean_armeb +#define cpu_physical_memory_reset_dirty cpu_physical_memory_reset_dirty_armeb +#define cpu_physical_memory_rw cpu_physical_memory_rw_armeb +#define cpu_physical_memory_set_dirty_flag cpu_physical_memory_set_dirty_flag_armeb +#define cpu_physical_memory_set_dirty_range cpu_physical_memory_set_dirty_range_armeb +#define cpu_physical_memory_unmap cpu_physical_memory_unmap_armeb +#define cpu_physical_memory_write_rom cpu_physical_memory_write_rom_armeb +#define cpu_physical_memory_write_rom_internal cpu_physical_memory_write_rom_internal_armeb +#define cpu_register cpu_register_armeb +#define cpu_register_types cpu_register_types_armeb +#define cpu_restore_state cpu_restore_state_armeb +#define cpu_restore_state_from_tb cpu_restore_state_from_tb_armeb +#define cpu_single_step cpu_single_step_armeb +#define cpu_tb_exec cpu_tb_exec_armeb +#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_armeb +#define cpu_to_be64 cpu_to_be64_armeb +#define cpu_to_le32 cpu_to_le32_armeb +#define cpu_to_le64 cpu_to_le64_armeb +#define cpu_type_info cpu_type_info_armeb +#define cpu_unassigned_access cpu_unassigned_access_armeb +#define cpu_watchpoint_address_matches cpu_watchpoint_address_matches_armeb +#define cpu_watchpoint_insert cpu_watchpoint_insert_armeb +#define cpu_watchpoint_remove cpu_watchpoint_remove_armeb +#define cpu_watchpoint_remove_all cpu_watchpoint_remove_all_armeb +#define cpu_watchpoint_remove_by_ref cpu_watchpoint_remove_by_ref_armeb +#define crc32c_table crc32c_table_armeb +#define create_new_memory_mapping create_new_memory_mapping_armeb +#define csselr_write csselr_write_armeb +#define cto32 cto32_armeb +#define ctr_el0_access ctr_el0_access_armeb +#define ctz32 ctz32_armeb +#define ctz64 ctz64_armeb +#define dacr_write dacr_write_armeb +#define dbgbcr_write dbgbcr_write_armeb +#define dbgbvr_write dbgbvr_write_armeb +#define dbgwcr_write dbgwcr_write_armeb +#define dbgwvr_write dbgwvr_write_armeb +#define debug_cp_reginfo debug_cp_reginfo_armeb +#define debug_frame debug_frame_armeb +#define debug_lpae_cp_reginfo debug_lpae_cp_reginfo_armeb +#define define_armeb_cp_regs define_armeb_cp_regs_armeb +#define define_armeb_cp_regs_with_opaque define_armeb_cp_regs_with_opaque_armeb +#define define_debug_regs define_debug_regs_armeb +#define define_one_armeb_cp_reg define_one_armeb_cp_reg_armeb +#define define_one_armeb_cp_reg_with_opaque define_one_armeb_cp_reg_with_opaque_armeb +#define deposit32 deposit32_armeb +#define deposit64 deposit64_armeb +#define deregister_tm_clones deregister_tm_clones_armeb +#define device_class_base_init device_class_base_init_armeb +#define device_class_init device_class_init_armeb +#define device_finalize device_finalize_armeb +#define device_get_realized device_get_realized_armeb +#define device_initfn device_initfn_armeb +#define device_post_init device_post_init_armeb +#define device_reset device_reset_armeb +#define device_set_realized device_set_realized_armeb +#define device_type_info device_type_info_armeb +#define disas_armeb_insn disas_armeb_insn_armeb +#define disas_coproc_insn disas_coproc_insn_armeb +#define disas_dsp_insn disas_dsp_insn_armeb +#define disas_iwmmxt_insn disas_iwmmxt_insn_armeb +#define disas_neon_data_insn disas_neon_data_insn_armeb +#define disas_neon_ls_insn disas_neon_ls_insn_armeb +#define disas_thumb2_insn disas_thumb2_insn_armeb +#define disas_thumb_insn disas_thumb_insn_armeb +#define disas_vfp_insn disas_vfp_insn_armeb +#define disas_vfp_v8_insn disas_vfp_v8_insn_armeb +#define do_armeb_semihosting do_armeb_semihosting_armeb +#define do_clz16 do_clz16_armeb +#define do_clz8 do_clz8_armeb +#define do_constant_folding do_constant_folding_armeb +#define do_constant_folding_2 do_constant_folding_2_armeb +#define do_constant_folding_cond do_constant_folding_cond_armeb +#define do_constant_folding_cond2 do_constant_folding_cond2_armeb +#define do_constant_folding_cond_32 do_constant_folding_cond_32_armeb +#define do_constant_folding_cond_64 do_constant_folding_cond_64_armeb +#define do_constant_folding_cond_eq do_constant_folding_cond_eq_armeb +#define do_fcvt_f16_to_f32 do_fcvt_f16_to_f32_armeb +#define do_fcvt_f32_to_f16 do_fcvt_f32_to_f16_armeb +#define do_ssat do_ssat_armeb +#define do_usad do_usad_armeb +#define do_usat do_usat_armeb +#define do_v7m_exception_exit do_v7m_exception_exit_armeb +#define dummy_c15_cp_reginfo dummy_c15_cp_reginfo_armeb +#define dummy_func dummy_func_armeb +#define dummy_section dummy_section_armeb +#define _DYNAMIC _DYNAMIC_armeb +#define _edata _edata_armeb +#define _end _end_armeb +#define end_list end_list_armeb +#define eq128 eq128_armeb +#define ErrorClass_lookup ErrorClass_lookup_armeb +#define error_copy error_copy_armeb +#define error_exit error_exit_armeb +#define error_get_class error_get_class_armeb +#define error_get_pretty error_get_pretty_armeb +#define error_setg_file_open error_setg_file_open_armeb +#define estimateDiv128To64 estimateDiv128To64_armeb +#define estimateSqrt32 estimateSqrt32_armeb +#define excnames excnames_armeb +#define excp_is_internal excp_is_internal_armeb +#define extended_addresses_enabled extended_addresses_enabled_armeb +#define extended_mpu_ap_bits extended_mpu_ap_bits_armeb +#define extract32 extract32_armeb +#define extract64 extract64_armeb +#define extractFloat128Exp extractFloat128Exp_armeb +#define extractFloat128Frac0 extractFloat128Frac0_armeb +#define extractFloat128Frac1 extractFloat128Frac1_armeb +#define extractFloat128Sign extractFloat128Sign_armeb +#define extractFloat16Exp extractFloat16Exp_armeb +#define extractFloat16Frac extractFloat16Frac_armeb +#define extractFloat16Sign extractFloat16Sign_armeb +#define extractFloat32Exp extractFloat32Exp_armeb +#define extractFloat32Frac extractFloat32Frac_armeb +#define extractFloat32Sign extractFloat32Sign_armeb +#define extractFloat64Exp extractFloat64Exp_armeb +#define extractFloat64Frac extractFloat64Frac_armeb +#define extractFloat64Sign extractFloat64Sign_armeb +#define extractFloatx80Exp extractFloatx80Exp_armeb +#define extractFloatx80Frac extractFloatx80Frac_armeb +#define extractFloatx80Sign extractFloatx80Sign_armeb +#define fcse_write fcse_write_armeb +#define find_better_copy find_better_copy_armeb +#define find_default_machine find_default_machine_armeb +#define find_desc_by_name find_desc_by_name_armeb +#define find_first_bit find_first_bit_armeb +#define find_paging_enabled_cpu find_paging_enabled_cpu_armeb +#define find_ram_block find_ram_block_armeb +#define find_ram_offset find_ram_offset_armeb +#define find_string find_string_armeb +#define find_type find_type_armeb +#define _fini _fini_armeb +#define flatrange_equal flatrange_equal_armeb +#define flatview_destroy flatview_destroy_armeb +#define flatview_init flatview_init_armeb +#define flatview_insert flatview_insert_armeb +#define flatview_lookup flatview_lookup_armeb +#define flatview_ref flatview_ref_armeb +#define flatview_simplify flatview_simplify_armeb +#define flatview_unref flatview_unref_armeb +#define float128_add float128_add_armeb +#define float128_compare float128_compare_armeb +#define float128_compare_internal float128_compare_internal_armeb +#define float128_compare_quiet float128_compare_quiet_armeb +#define float128_default_nan float128_default_nan_armeb +#define float128_div float128_div_armeb +#define float128_eq float128_eq_armeb +#define float128_eq_quiet float128_eq_quiet_armeb +#define float128_is_quiet_nan float128_is_quiet_nan_armeb +#define float128_is_signaling_nan float128_is_signaling_nan_armeb +#define float128_le float128_le_armeb +#define float128_le_quiet float128_le_quiet_armeb +#define float128_lt float128_lt_armeb +#define float128_lt_quiet float128_lt_quiet_armeb +#define float128_maybe_silence_nan float128_maybe_silence_nan_armeb +#define float128_mul float128_mul_armeb +#define float128_rem float128_rem_armeb +#define float128_round_to_int float128_round_to_int_armeb +#define float128_scalbn float128_scalbn_armeb +#define float128_sqrt float128_sqrt_armeb +#define float128_sub float128_sub_armeb +#define float128ToCommonNaN float128ToCommonNaN_armeb +#define float128_to_float32 float128_to_float32_armeb +#define float128_to_float64 float128_to_float64_armeb +#define float128_to_floatx80 float128_to_floatx80_armeb +#define float128_to_int32 float128_to_int32_armeb +#define float128_to_int32_round_to_zero float128_to_int32_round_to_zero_armeb +#define float128_to_int64 float128_to_int64_armeb +#define float128_to_int64_round_to_zero float128_to_int64_round_to_zero_armeb +#define float128_unordered float128_unordered_armeb +#define float128_unordered_quiet float128_unordered_quiet_armeb +#define float16_default_nan float16_default_nan_armeb +#define float16_is_quiet_nan float16_is_quiet_nan_armeb +#define float16_is_signaling_nan float16_is_signaling_nan_armeb +#define float16_maybe_silence_nan float16_maybe_silence_nan_armeb +#define float16ToCommonNaN float16ToCommonNaN_armeb +#define float16_to_float32 float16_to_float32_armeb +#define float16_to_float64 float16_to_float64_armeb +#define float32_abs float32_abs_armeb +#define float32_add float32_add_armeb +#define float32_chs float32_chs_armeb +#define float32_compare float32_compare_armeb +#define float32_compare_internal float32_compare_internal_armeb +#define float32_compare_quiet float32_compare_quiet_armeb +#define float32_default_nan float32_default_nan_armeb +#define float32_div float32_div_armeb +#define float32_eq float32_eq_armeb +#define float32_eq_quiet float32_eq_quiet_armeb +#define float32_exp2 float32_exp2_armeb +#define float32_exp2_coefficients float32_exp2_coefficients_armeb +#define float32_is_any_nan float32_is_any_nan_armeb +#define float32_is_infinity float32_is_infinity_armeb +#define float32_is_neg float32_is_neg_armeb +#define float32_is_quiet_nan float32_is_quiet_nan_armeb +#define float32_is_signaling_nan float32_is_signaling_nan_armeb +#define float32_is_zero float32_is_zero_armeb +#define float32_is_zero_or_denormal float32_is_zero_or_denormal_armeb +#define float32_le float32_le_armeb +#define float32_le_quiet float32_le_quiet_armeb +#define float32_log2 float32_log2_armeb +#define float32_lt float32_lt_armeb +#define float32_lt_quiet float32_lt_quiet_armeb +#define float32_max float32_max_armeb +#define float32_maxnum float32_maxnum_armeb +#define float32_maxnummag float32_maxnummag_armeb +#define float32_maybe_silence_nan float32_maybe_silence_nan_armeb +#define float32_min float32_min_armeb +#define float32_minmax float32_minmax_armeb +#define float32_minnum float32_minnum_armeb +#define float32_minnummag float32_minnummag_armeb +#define float32_mul float32_mul_armeb +#define float32_muladd float32_muladd_armeb +#define float32_rem float32_rem_armeb +#define float32_round_to_int float32_round_to_int_armeb +#define float32_scalbn float32_scalbn_armeb +#define float32_set_sign float32_set_sign_armeb +#define float32_sqrt float32_sqrt_armeb +#define float32_squash_input_denormal float32_squash_input_denormal_armeb +#define float32_sub float32_sub_armeb +#define float32ToCommonNaN float32ToCommonNaN_armeb +#define float32_to_float128 float32_to_float128_armeb +#define float32_to_float16 float32_to_float16_armeb +#define float32_to_float64 float32_to_float64_armeb +#define float32_to_floatx80 float32_to_floatx80_armeb +#define float32_to_int16 float32_to_int16_armeb +#define float32_to_int16_round_to_zero float32_to_int16_round_to_zero_armeb +#define float32_to_int32 float32_to_int32_armeb +#define float32_to_int32_round_to_zero float32_to_int32_round_to_zero_armeb +#define float32_to_int64 float32_to_int64_armeb +#define float32_to_int64_round_to_zero float32_to_int64_round_to_zero_armeb +#define float32_to_uint16 float32_to_uint16_armeb +#define float32_to_uint16_round_to_zero float32_to_uint16_round_to_zero_armeb +#define float32_to_uint32 float32_to_uint32_armeb +#define float32_to_uint32_round_to_zero float32_to_uint32_round_to_zero_armeb +#define float32_to_uint64 float32_to_uint64_armeb +#define float32_to_uint64_round_to_zero float32_to_uint64_round_to_zero_armeb +#define float32_unordered float32_unordered_armeb +#define float32_unordered_quiet float32_unordered_quiet_armeb +#define float64_abs float64_abs_armeb +#define float64_add float64_add_armeb +#define float64_chs float64_chs_armeb +#define float64_compare float64_compare_armeb +#define float64_compare_internal float64_compare_internal_armeb +#define float64_compare_quiet float64_compare_quiet_armeb +#define float64_default_nan float64_default_nan_armeb +#define float64_div float64_div_armeb +#define float64_eq float64_eq_armeb +#define float64_eq_quiet float64_eq_quiet_armeb +#define float64_is_any_nan float64_is_any_nan_armeb +#define float64_is_infinity float64_is_infinity_armeb +#define float64_is_neg float64_is_neg_armeb +#define float64_is_quiet_nan float64_is_quiet_nan_armeb +#define float64_is_signaling_nan float64_is_signaling_nan_armeb +#define float64_is_zero float64_is_zero_armeb +#define float64_le float64_le_armeb +#define float64_le_quiet float64_le_quiet_armeb +#define float64_log2 float64_log2_armeb +#define float64_lt float64_lt_armeb +#define float64_lt_quiet float64_lt_quiet_armeb +#define float64_max float64_max_armeb +#define float64_maxnum float64_maxnum_armeb +#define float64_maxnummag float64_maxnummag_armeb +#define float64_maybe_silence_nan float64_maybe_silence_nan_armeb +#define float64_min float64_min_armeb +#define float64_minmax float64_minmax_armeb +#define float64_minnum float64_minnum_armeb +#define float64_minnummag float64_minnummag_armeb +#define float64_mul float64_mul_armeb +#define float64_muladd float64_muladd_armeb +#define float64_rem float64_rem_armeb +#define float64_round_to_int float64_round_to_int_armeb +#define float64_scalbn float64_scalbn_armeb +#define float64_set_sign float64_set_sign_armeb +#define float64_sqrt float64_sqrt_armeb +#define float64_squash_input_denormal float64_squash_input_denormal_armeb +#define float64_sub float64_sub_armeb +#define float64ToCommonNaN float64ToCommonNaN_armeb +#define float64_to_float128 float64_to_float128_armeb +#define float64_to_float16 float64_to_float16_armeb +#define float64_to_float32 float64_to_float32_armeb +#define float64_to_floatx80 float64_to_floatx80_armeb +#define float64_to_int16 float64_to_int16_armeb +#define float64_to_int16_round_to_zero float64_to_int16_round_to_zero_armeb +#define float64_to_int32 float64_to_int32_armeb +#define float64_to_int32_round_to_zero float64_to_int32_round_to_zero_armeb +#define float64_to_int64 float64_to_int64_armeb +#define float64_to_int64_round_to_zero float64_to_int64_round_to_zero_armeb +#define float64_to_uint16 float64_to_uint16_armeb +#define float64_to_uint16_round_to_zero float64_to_uint16_round_to_zero_armeb +#define float64_to_uint32 float64_to_uint32_armeb +#define float64_to_uint32_round_to_zero float64_to_uint32_round_to_zero_armeb +#define float64_to_uint64 float64_to_uint64_armeb +#define float64_to_uint64_round_to_zero float64_to_uint64_round_to_zero_armeb +#define float64_trunc_to_int float64_trunc_to_int_armeb +#define float64_unordered float64_unordered_armeb +#define float64_unordered_quiet float64_unordered_quiet_armeb +#define float_raise float_raise_armeb +#define floatx80_add floatx80_add_armeb +#define floatx80_compare floatx80_compare_armeb +#define floatx80_compare_internal floatx80_compare_internal_armeb +#define floatx80_compare_quiet floatx80_compare_quiet_armeb +#define floatx80_default_nan floatx80_default_nan_armeb +#define floatx80_div floatx80_div_armeb +#define floatx80_eq floatx80_eq_armeb +#define floatx80_eq_quiet floatx80_eq_quiet_armeb +#define floatx80_is_quiet_nan floatx80_is_quiet_nan_armeb +#define floatx80_is_signaling_nan floatx80_is_signaling_nan_armeb +#define floatx80_le floatx80_le_armeb +#define floatx80_le_quiet floatx80_le_quiet_armeb +#define floatx80_lt floatx80_lt_armeb +#define floatx80_lt_quiet floatx80_lt_quiet_armeb +#define floatx80_maybe_silence_nan floatx80_maybe_silence_nan_armeb +#define floatx80_mul floatx80_mul_armeb +#define floatx80_rem floatx80_rem_armeb +#define floatx80_round_to_int floatx80_round_to_int_armeb +#define floatx80_scalbn floatx80_scalbn_armeb +#define floatx80_sqrt floatx80_sqrt_armeb +#define floatx80_sub floatx80_sub_armeb +#define floatx80ToCommonNaN floatx80ToCommonNaN_armeb +#define floatx80_to_float128 floatx80_to_float128_armeb +#define floatx80_to_float32 floatx80_to_float32_armeb +#define floatx80_to_float64 floatx80_to_float64_armeb +#define floatx80_to_int32 floatx80_to_int32_armeb +#define floatx80_to_int32_round_to_zero floatx80_to_int32_round_to_zero_armeb +#define floatx80_to_int64 floatx80_to_int64_armeb +#define floatx80_to_int64_round_to_zero floatx80_to_int64_round_to_zero_armeb +#define floatx80_unordered floatx80_unordered_armeb +#define floatx80_unordered_quiet floatx80_unordered_quiet_armeb +#define flush_icache_range flush_icache_range_armeb +#define format_string format_string_armeb +#define fp_decode_rm fp_decode_rm_armeb +#define frame_dummy frame_dummy_armeb +#define free_range free_range_armeb +#define fstat64 fstat64_armeb +#define futex_wait futex_wait_armeb +#define futex_wake futex_wake_armeb +#define gen_aa32_ld16s gen_aa32_ld16s_armeb +#define gen_aa32_ld16u gen_aa32_ld16u_armeb +#define gen_aa32_ld32u gen_aa32_ld32u_armeb +#define gen_aa32_ld64 gen_aa32_ld64_armeb +#define gen_aa32_ld8s gen_aa32_ld8s_armeb +#define gen_aa32_ld8u gen_aa32_ld8u_armeb +#define gen_aa32_st16 gen_aa32_st16_armeb +#define gen_aa32_st32 gen_aa32_st32_armeb +#define gen_aa32_st64 gen_aa32_st64_armeb +#define gen_aa32_st8 gen_aa32_st8_armeb +#define gen_adc gen_adc_armeb +#define gen_adc_CC gen_adc_CC_armeb +#define gen_add16 gen_add16_armeb +#define gen_add_carry gen_add_carry_armeb +#define gen_add_CC gen_add_CC_armeb +#define gen_add_datah_offset gen_add_datah_offset_armeb +#define gen_add_data_offset gen_add_data_offset_armeb +#define gen_addq gen_addq_armeb +#define gen_addq_lo gen_addq_lo_armeb +#define gen_addq_msw gen_addq_msw_armeb +#define gen_armeb_parallel_addsub gen_armeb_parallel_addsub_armeb +#define gen_armeb_shift_im gen_armeb_shift_im_armeb +#define gen_armeb_shift_reg gen_armeb_shift_reg_armeb +#define gen_bx gen_bx_armeb +#define gen_bx_im gen_bx_im_armeb +#define gen_clrex gen_clrex_armeb +#define generate_memory_topology generate_memory_topology_armeb +#define generic_timer_cp_reginfo generic_timer_cp_reginfo_armeb +#define gen_exception gen_exception_armeb +#define gen_exception_insn gen_exception_insn_armeb +#define gen_exception_internal gen_exception_internal_armeb +#define gen_exception_internal_insn gen_exception_internal_insn_armeb +#define gen_exception_return gen_exception_return_armeb +#define gen_goto_tb gen_goto_tb_armeb +#define gen_helper_access_check_cp_reg gen_helper_access_check_cp_reg_armeb +#define gen_helper_add_saturate gen_helper_add_saturate_armeb +#define gen_helper_add_setq gen_helper_add_setq_armeb +#define gen_helper_clear_pstate_ss gen_helper_clear_pstate_ss_armeb +#define gen_helper_clz32 gen_helper_clz32_armeb +#define gen_helper_clz64 gen_helper_clz64_armeb +#define gen_helper_clz_armeb gen_helper_clz_armeb_armeb +#define gen_helper_cpsr_read gen_helper_cpsr_read_armeb +#define gen_helper_cpsr_write gen_helper_cpsr_write_armeb +#define gen_helper_crc32_armeb gen_helper_crc32_armeb_armeb +#define gen_helper_crc32c gen_helper_crc32c_armeb +#define gen_helper_crypto_aese gen_helper_crypto_aese_armeb +#define gen_helper_crypto_aesmc gen_helper_crypto_aesmc_armeb +#define gen_helper_crypto_sha1_3reg gen_helper_crypto_sha1_3reg_armeb +#define gen_helper_crypto_sha1h gen_helper_crypto_sha1h_armeb +#define gen_helper_crypto_sha1su1 gen_helper_crypto_sha1su1_armeb +#define gen_helper_crypto_sha256h gen_helper_crypto_sha256h_armeb +#define gen_helper_crypto_sha256h2 gen_helper_crypto_sha256h2_armeb +#define gen_helper_crypto_sha256su0 gen_helper_crypto_sha256su0_armeb +#define gen_helper_crypto_sha256su1 gen_helper_crypto_sha256su1_armeb +#define gen_helper_double_saturate gen_helper_double_saturate_armeb +#define gen_helper_exception_internal gen_helper_exception_internal_armeb +#define gen_helper_exception_with_syndrome gen_helper_exception_with_syndrome_armeb +#define gen_helper_get_cp_reg gen_helper_get_cp_reg_armeb +#define gen_helper_get_cp_reg64 gen_helper_get_cp_reg64_armeb +#define gen_helper_get_r13_banked gen_helper_get_r13_banked_armeb +#define gen_helper_get_user_reg gen_helper_get_user_reg_armeb +#define gen_helper_iwmmxt_addcb gen_helper_iwmmxt_addcb_armeb +#define gen_helper_iwmmxt_addcl gen_helper_iwmmxt_addcl_armeb +#define gen_helper_iwmmxt_addcw gen_helper_iwmmxt_addcw_armeb +#define gen_helper_iwmmxt_addnb gen_helper_iwmmxt_addnb_armeb +#define gen_helper_iwmmxt_addnl gen_helper_iwmmxt_addnl_armeb +#define gen_helper_iwmmxt_addnw gen_helper_iwmmxt_addnw_armeb +#define gen_helper_iwmmxt_addsb gen_helper_iwmmxt_addsb_armeb +#define gen_helper_iwmmxt_addsl gen_helper_iwmmxt_addsl_armeb +#define gen_helper_iwmmxt_addsw gen_helper_iwmmxt_addsw_armeb +#define gen_helper_iwmmxt_addub gen_helper_iwmmxt_addub_armeb +#define gen_helper_iwmmxt_addul gen_helper_iwmmxt_addul_armeb +#define gen_helper_iwmmxt_adduw gen_helper_iwmmxt_adduw_armeb +#define gen_helper_iwmmxt_align gen_helper_iwmmxt_align_armeb +#define gen_helper_iwmmxt_avgb0 gen_helper_iwmmxt_avgb0_armeb +#define gen_helper_iwmmxt_avgb1 gen_helper_iwmmxt_avgb1_armeb +#define gen_helper_iwmmxt_avgw0 gen_helper_iwmmxt_avgw0_armeb +#define gen_helper_iwmmxt_avgw1 gen_helper_iwmmxt_avgw1_armeb +#define gen_helper_iwmmxt_bcstb gen_helper_iwmmxt_bcstb_armeb +#define gen_helper_iwmmxt_bcstl gen_helper_iwmmxt_bcstl_armeb +#define gen_helper_iwmmxt_bcstw gen_helper_iwmmxt_bcstw_armeb +#define gen_helper_iwmmxt_cmpeqb gen_helper_iwmmxt_cmpeqb_armeb +#define gen_helper_iwmmxt_cmpeql gen_helper_iwmmxt_cmpeql_armeb +#define gen_helper_iwmmxt_cmpeqw gen_helper_iwmmxt_cmpeqw_armeb +#define gen_helper_iwmmxt_cmpgtsb gen_helper_iwmmxt_cmpgtsb_armeb +#define gen_helper_iwmmxt_cmpgtsl gen_helper_iwmmxt_cmpgtsl_armeb +#define gen_helper_iwmmxt_cmpgtsw gen_helper_iwmmxt_cmpgtsw_armeb +#define gen_helper_iwmmxt_cmpgtub gen_helper_iwmmxt_cmpgtub_armeb +#define gen_helper_iwmmxt_cmpgtul gen_helper_iwmmxt_cmpgtul_armeb +#define gen_helper_iwmmxt_cmpgtuw gen_helper_iwmmxt_cmpgtuw_armeb +#define gen_helper_iwmmxt_insr gen_helper_iwmmxt_insr_armeb +#define gen_helper_iwmmxt_macsw gen_helper_iwmmxt_macsw_armeb +#define gen_helper_iwmmxt_macuw gen_helper_iwmmxt_macuw_armeb +#define gen_helper_iwmmxt_maddsq gen_helper_iwmmxt_maddsq_armeb +#define gen_helper_iwmmxt_madduq gen_helper_iwmmxt_madduq_armeb +#define gen_helper_iwmmxt_maxsb gen_helper_iwmmxt_maxsb_armeb +#define gen_helper_iwmmxt_maxsl gen_helper_iwmmxt_maxsl_armeb +#define gen_helper_iwmmxt_maxsw gen_helper_iwmmxt_maxsw_armeb +#define gen_helper_iwmmxt_maxub gen_helper_iwmmxt_maxub_armeb +#define gen_helper_iwmmxt_maxul gen_helper_iwmmxt_maxul_armeb +#define gen_helper_iwmmxt_maxuw gen_helper_iwmmxt_maxuw_armeb +#define gen_helper_iwmmxt_minsb gen_helper_iwmmxt_minsb_armeb +#define gen_helper_iwmmxt_minsl gen_helper_iwmmxt_minsl_armeb +#define gen_helper_iwmmxt_minsw gen_helper_iwmmxt_minsw_armeb +#define gen_helper_iwmmxt_minub gen_helper_iwmmxt_minub_armeb +#define gen_helper_iwmmxt_minul gen_helper_iwmmxt_minul_armeb +#define gen_helper_iwmmxt_minuw gen_helper_iwmmxt_minuw_armeb +#define gen_helper_iwmmxt_msbb gen_helper_iwmmxt_msbb_armeb +#define gen_helper_iwmmxt_msbl gen_helper_iwmmxt_msbl_armeb +#define gen_helper_iwmmxt_msbw gen_helper_iwmmxt_msbw_armeb +#define gen_helper_iwmmxt_muladdsl gen_helper_iwmmxt_muladdsl_armeb +#define gen_helper_iwmmxt_muladdsw gen_helper_iwmmxt_muladdsw_armeb +#define gen_helper_iwmmxt_muladdswl gen_helper_iwmmxt_muladdswl_armeb +#define gen_helper_iwmmxt_mulshw gen_helper_iwmmxt_mulshw_armeb +#define gen_helper_iwmmxt_mulslw gen_helper_iwmmxt_mulslw_armeb +#define gen_helper_iwmmxt_muluhw gen_helper_iwmmxt_muluhw_armeb +#define gen_helper_iwmmxt_mululw gen_helper_iwmmxt_mululw_armeb +#define gen_helper_iwmmxt_packsl gen_helper_iwmmxt_packsl_armeb +#define gen_helper_iwmmxt_packsq gen_helper_iwmmxt_packsq_armeb +#define gen_helper_iwmmxt_packsw gen_helper_iwmmxt_packsw_armeb +#define gen_helper_iwmmxt_packul gen_helper_iwmmxt_packul_armeb +#define gen_helper_iwmmxt_packuq gen_helper_iwmmxt_packuq_armeb +#define gen_helper_iwmmxt_packuw gen_helper_iwmmxt_packuw_armeb +#define gen_helper_iwmmxt_rorl gen_helper_iwmmxt_rorl_armeb +#define gen_helper_iwmmxt_rorq gen_helper_iwmmxt_rorq_armeb +#define gen_helper_iwmmxt_rorw gen_helper_iwmmxt_rorw_armeb +#define gen_helper_iwmmxt_sadb gen_helper_iwmmxt_sadb_armeb +#define gen_helper_iwmmxt_sadw gen_helper_iwmmxt_sadw_armeb +#define gen_helper_iwmmxt_setpsr_nz gen_helper_iwmmxt_setpsr_nz_armeb +#define gen_helper_iwmmxt_shufh gen_helper_iwmmxt_shufh_armeb +#define gen_helper_iwmmxt_slll gen_helper_iwmmxt_slll_armeb +#define gen_helper_iwmmxt_sllq gen_helper_iwmmxt_sllq_armeb +#define gen_helper_iwmmxt_sllw gen_helper_iwmmxt_sllw_armeb +#define gen_helper_iwmmxt_sral gen_helper_iwmmxt_sral_armeb +#define gen_helper_iwmmxt_sraq gen_helper_iwmmxt_sraq_armeb +#define gen_helper_iwmmxt_sraw gen_helper_iwmmxt_sraw_armeb +#define gen_helper_iwmmxt_srll gen_helper_iwmmxt_srll_armeb +#define gen_helper_iwmmxt_srlq gen_helper_iwmmxt_srlq_armeb +#define gen_helper_iwmmxt_srlw gen_helper_iwmmxt_srlw_armeb +#define gen_helper_iwmmxt_subnb gen_helper_iwmmxt_subnb_armeb +#define gen_helper_iwmmxt_subnl gen_helper_iwmmxt_subnl_armeb +#define gen_helper_iwmmxt_subnw gen_helper_iwmmxt_subnw_armeb +#define gen_helper_iwmmxt_subsb gen_helper_iwmmxt_subsb_armeb +#define gen_helper_iwmmxt_subsl gen_helper_iwmmxt_subsl_armeb +#define gen_helper_iwmmxt_subsw gen_helper_iwmmxt_subsw_armeb +#define gen_helper_iwmmxt_subub gen_helper_iwmmxt_subub_armeb +#define gen_helper_iwmmxt_subul gen_helper_iwmmxt_subul_armeb +#define gen_helper_iwmmxt_subuw gen_helper_iwmmxt_subuw_armeb +#define gen_helper_iwmmxt_unpackhb gen_helper_iwmmxt_unpackhb_armeb +#define gen_helper_iwmmxt_unpackhl gen_helper_iwmmxt_unpackhl_armeb +#define gen_helper_iwmmxt_unpackhsb gen_helper_iwmmxt_unpackhsb_armeb +#define gen_helper_iwmmxt_unpackhsl gen_helper_iwmmxt_unpackhsl_armeb +#define gen_helper_iwmmxt_unpackhsw gen_helper_iwmmxt_unpackhsw_armeb +#define gen_helper_iwmmxt_unpackhub gen_helper_iwmmxt_unpackhub_armeb +#define gen_helper_iwmmxt_unpackhul gen_helper_iwmmxt_unpackhul_armeb +#define gen_helper_iwmmxt_unpackhuw gen_helper_iwmmxt_unpackhuw_armeb +#define gen_helper_iwmmxt_unpackhw gen_helper_iwmmxt_unpackhw_armeb +#define gen_helper_iwmmxt_unpacklb gen_helper_iwmmxt_unpacklb_armeb +#define gen_helper_iwmmxt_unpackll gen_helper_iwmmxt_unpackll_armeb +#define gen_helper_iwmmxt_unpacklsb gen_helper_iwmmxt_unpacklsb_armeb +#define gen_helper_iwmmxt_unpacklsl gen_helper_iwmmxt_unpacklsl_armeb +#define gen_helper_iwmmxt_unpacklsw gen_helper_iwmmxt_unpacklsw_armeb +#define gen_helper_iwmmxt_unpacklub gen_helper_iwmmxt_unpacklub_armeb +#define gen_helper_iwmmxt_unpacklul gen_helper_iwmmxt_unpacklul_armeb +#define gen_helper_iwmmxt_unpackluw gen_helper_iwmmxt_unpackluw_armeb +#define gen_helper_iwmmxt_unpacklw gen_helper_iwmmxt_unpacklw_armeb +#define gen_helper_neon_abd_f32 gen_helper_neon_abd_f32_armeb +#define gen_helper_neon_abdl_s16 gen_helper_neon_abdl_s16_armeb +#define gen_helper_neon_abdl_s32 gen_helper_neon_abdl_s32_armeb +#define gen_helper_neon_abdl_s64 gen_helper_neon_abdl_s64_armeb +#define gen_helper_neon_abdl_u16 gen_helper_neon_abdl_u16_armeb +#define gen_helper_neon_abdl_u32 gen_helper_neon_abdl_u32_armeb +#define gen_helper_neon_abdl_u64 gen_helper_neon_abdl_u64_armeb +#define gen_helper_neon_abd_s16 gen_helper_neon_abd_s16_armeb +#define gen_helper_neon_abd_s32 gen_helper_neon_abd_s32_armeb +#define gen_helper_neon_abd_s8 gen_helper_neon_abd_s8_armeb +#define gen_helper_neon_abd_u16 gen_helper_neon_abd_u16_armeb +#define gen_helper_neon_abd_u32 gen_helper_neon_abd_u32_armeb +#define gen_helper_neon_abd_u8 gen_helper_neon_abd_u8_armeb +#define gen_helper_neon_abs_s16 gen_helper_neon_abs_s16_armeb +#define gen_helper_neon_abs_s8 gen_helper_neon_abs_s8_armeb +#define gen_helper_neon_acge_f32 gen_helper_neon_acge_f32_armeb +#define gen_helper_neon_acgt_f32 gen_helper_neon_acgt_f32_armeb +#define gen_helper_neon_addl_saturate_s32 gen_helper_neon_addl_saturate_s32_armeb +#define gen_helper_neon_addl_saturate_s64 gen_helper_neon_addl_saturate_s64_armeb +#define gen_helper_neon_addl_u16 gen_helper_neon_addl_u16_armeb +#define gen_helper_neon_addl_u32 gen_helper_neon_addl_u32_armeb +#define gen_helper_neon_add_u16 gen_helper_neon_add_u16_armeb +#define gen_helper_neon_add_u8 gen_helper_neon_add_u8_armeb +#define gen_helper_neon_ceq_f32 gen_helper_neon_ceq_f32_armeb +#define gen_helper_neon_ceq_u16 gen_helper_neon_ceq_u16_armeb +#define gen_helper_neon_ceq_u32 gen_helper_neon_ceq_u32_armeb +#define gen_helper_neon_ceq_u8 gen_helper_neon_ceq_u8_armeb +#define gen_helper_neon_cge_f32 gen_helper_neon_cge_f32_armeb +#define gen_helper_neon_cge_s16 gen_helper_neon_cge_s16_armeb +#define gen_helper_neon_cge_s32 gen_helper_neon_cge_s32_armeb +#define gen_helper_neon_cge_s8 gen_helper_neon_cge_s8_armeb +#define gen_helper_neon_cge_u16 gen_helper_neon_cge_u16_armeb +#define gen_helper_neon_cge_u32 gen_helper_neon_cge_u32_armeb +#define gen_helper_neon_cge_u8 gen_helper_neon_cge_u8_armeb +#define gen_helper_neon_cgt_f32 gen_helper_neon_cgt_f32_armeb +#define gen_helper_neon_cgt_s16 gen_helper_neon_cgt_s16_armeb +#define gen_helper_neon_cgt_s32 gen_helper_neon_cgt_s32_armeb +#define gen_helper_neon_cgt_s8 gen_helper_neon_cgt_s8_armeb +#define gen_helper_neon_cgt_u16 gen_helper_neon_cgt_u16_armeb +#define gen_helper_neon_cgt_u32 gen_helper_neon_cgt_u32_armeb +#define gen_helper_neon_cgt_u8 gen_helper_neon_cgt_u8_armeb +#define gen_helper_neon_cls_s16 gen_helper_neon_cls_s16_armeb +#define gen_helper_neon_cls_s32 gen_helper_neon_cls_s32_armeb +#define gen_helper_neon_cls_s8 gen_helper_neon_cls_s8_armeb +#define gen_helper_neon_clz_u16 gen_helper_neon_clz_u16_armeb +#define gen_helper_neon_clz_u8 gen_helper_neon_clz_u8_armeb +#define gen_helper_neon_cnt_u8 gen_helper_neon_cnt_u8_armeb +#define gen_helper_neon_fcvt_f16_to_f32 gen_helper_neon_fcvt_f16_to_f32_armeb +#define gen_helper_neon_fcvt_f32_to_f16 gen_helper_neon_fcvt_f32_to_f16_armeb +#define gen_helper_neon_hadd_s16 gen_helper_neon_hadd_s16_armeb +#define gen_helper_neon_hadd_s32 gen_helper_neon_hadd_s32_armeb +#define gen_helper_neon_hadd_s8 gen_helper_neon_hadd_s8_armeb +#define gen_helper_neon_hadd_u16 gen_helper_neon_hadd_u16_armeb +#define gen_helper_neon_hadd_u32 gen_helper_neon_hadd_u32_armeb +#define gen_helper_neon_hadd_u8 gen_helper_neon_hadd_u8_armeb +#define gen_helper_neon_hsub_s16 gen_helper_neon_hsub_s16_armeb +#define gen_helper_neon_hsub_s32 gen_helper_neon_hsub_s32_armeb +#define gen_helper_neon_hsub_s8 gen_helper_neon_hsub_s8_armeb +#define gen_helper_neon_hsub_u16 gen_helper_neon_hsub_u16_armeb +#define gen_helper_neon_hsub_u32 gen_helper_neon_hsub_u32_armeb +#define gen_helper_neon_hsub_u8 gen_helper_neon_hsub_u8_armeb +#define gen_helper_neon_max_s16 gen_helper_neon_max_s16_armeb +#define gen_helper_neon_max_s32 gen_helper_neon_max_s32_armeb +#define gen_helper_neon_max_s8 gen_helper_neon_max_s8_armeb +#define gen_helper_neon_max_u16 gen_helper_neon_max_u16_armeb +#define gen_helper_neon_max_u32 gen_helper_neon_max_u32_armeb +#define gen_helper_neon_max_u8 gen_helper_neon_max_u8_armeb +#define gen_helper_neon_min_s16 gen_helper_neon_min_s16_armeb +#define gen_helper_neon_min_s32 gen_helper_neon_min_s32_armeb +#define gen_helper_neon_min_s8 gen_helper_neon_min_s8_armeb +#define gen_helper_neon_min_u16 gen_helper_neon_min_u16_armeb +#define gen_helper_neon_min_u32 gen_helper_neon_min_u32_armeb +#define gen_helper_neon_min_u8 gen_helper_neon_min_u8_armeb +#define gen_helper_neon_mull_p8 gen_helper_neon_mull_p8_armeb +#define gen_helper_neon_mull_s16 gen_helper_neon_mull_s16_armeb +#define gen_helper_neon_mull_s8 gen_helper_neon_mull_s8_armeb +#define gen_helper_neon_mull_u16 gen_helper_neon_mull_u16_armeb +#define gen_helper_neon_mull_u8 gen_helper_neon_mull_u8_armeb +#define gen_helper_neon_mul_p8 gen_helper_neon_mul_p8_armeb +#define gen_helper_neon_mul_u16 gen_helper_neon_mul_u16_armeb +#define gen_helper_neon_mul_u8 gen_helper_neon_mul_u8_armeb +#define gen_helper_neon_narrow_high_u16 gen_helper_neon_narrow_high_u16_armeb +#define gen_helper_neon_narrow_high_u8 gen_helper_neon_narrow_high_u8_armeb +#define gen_helper_neon_narrow_round_high_u16 gen_helper_neon_narrow_round_high_u16_armeb +#define gen_helper_neon_narrow_round_high_u8 gen_helper_neon_narrow_round_high_u8_armeb +#define gen_helper_neon_narrow_sat_s16 gen_helper_neon_narrow_sat_s16_armeb +#define gen_helper_neon_narrow_sat_s32 gen_helper_neon_narrow_sat_s32_armeb +#define gen_helper_neon_narrow_sat_s8 gen_helper_neon_narrow_sat_s8_armeb +#define gen_helper_neon_narrow_sat_u16 gen_helper_neon_narrow_sat_u16_armeb +#define gen_helper_neon_narrow_sat_u32 gen_helper_neon_narrow_sat_u32_armeb +#define gen_helper_neon_narrow_sat_u8 gen_helper_neon_narrow_sat_u8_armeb +#define gen_helper_neon_narrow_u16 gen_helper_neon_narrow_u16_armeb +#define gen_helper_neon_narrow_u8 gen_helper_neon_narrow_u8_armeb +#define gen_helper_neon_negl_u16 gen_helper_neon_negl_u16_armeb +#define gen_helper_neon_negl_u32 gen_helper_neon_negl_u32_armeb +#define gen_helper_neon_paddl_u16 gen_helper_neon_paddl_u16_armeb +#define gen_helper_neon_paddl_u32 gen_helper_neon_paddl_u32_armeb +#define gen_helper_neon_padd_u16 gen_helper_neon_padd_u16_armeb +#define gen_helper_neon_padd_u8 gen_helper_neon_padd_u8_armeb +#define gen_helper_neon_pmax_s16 gen_helper_neon_pmax_s16_armeb +#define gen_helper_neon_pmax_s8 gen_helper_neon_pmax_s8_armeb +#define gen_helper_neon_pmax_u16 gen_helper_neon_pmax_u16_armeb +#define gen_helper_neon_pmax_u8 gen_helper_neon_pmax_u8_armeb +#define gen_helper_neon_pmin_s16 gen_helper_neon_pmin_s16_armeb +#define gen_helper_neon_pmin_s8 gen_helper_neon_pmin_s8_armeb +#define gen_helper_neon_pmin_u16 gen_helper_neon_pmin_u16_armeb +#define gen_helper_neon_pmin_u8 gen_helper_neon_pmin_u8_armeb +#define gen_helper_neon_pmull_64_hi gen_helper_neon_pmull_64_hi_armeb +#define gen_helper_neon_pmull_64_lo gen_helper_neon_pmull_64_lo_armeb +#define gen_helper_neon_qabs_s16 gen_helper_neon_qabs_s16_armeb +#define gen_helper_neon_qabs_s32 gen_helper_neon_qabs_s32_armeb +#define gen_helper_neon_qabs_s8 gen_helper_neon_qabs_s8_armeb +#define gen_helper_neon_qadd_s16 gen_helper_neon_qadd_s16_armeb +#define gen_helper_neon_qadd_s32 gen_helper_neon_qadd_s32_armeb +#define gen_helper_neon_qadd_s64 gen_helper_neon_qadd_s64_armeb +#define gen_helper_neon_qadd_s8 gen_helper_neon_qadd_s8_armeb +#define gen_helper_neon_qadd_u16 gen_helper_neon_qadd_u16_armeb +#define gen_helper_neon_qadd_u32 gen_helper_neon_qadd_u32_armeb +#define gen_helper_neon_qadd_u64 gen_helper_neon_qadd_u64_armeb +#define gen_helper_neon_qadd_u8 gen_helper_neon_qadd_u8_armeb +#define gen_helper_neon_qdmulh_s16 gen_helper_neon_qdmulh_s16_armeb +#define gen_helper_neon_qdmulh_s32 gen_helper_neon_qdmulh_s32_armeb +#define gen_helper_neon_qneg_s16 gen_helper_neon_qneg_s16_armeb +#define gen_helper_neon_qneg_s32 gen_helper_neon_qneg_s32_armeb +#define gen_helper_neon_qneg_s8 gen_helper_neon_qneg_s8_armeb +#define gen_helper_neon_qrdmulh_s16 gen_helper_neon_qrdmulh_s16_armeb +#define gen_helper_neon_qrdmulh_s32 gen_helper_neon_qrdmulh_s32_armeb +#define gen_helper_neon_qrshl_s16 gen_helper_neon_qrshl_s16_armeb +#define gen_helper_neon_qrshl_s32 gen_helper_neon_qrshl_s32_armeb +#define gen_helper_neon_qrshl_s64 gen_helper_neon_qrshl_s64_armeb +#define gen_helper_neon_qrshl_s8 gen_helper_neon_qrshl_s8_armeb +#define gen_helper_neon_qrshl_u16 gen_helper_neon_qrshl_u16_armeb +#define gen_helper_neon_qrshl_u32 gen_helper_neon_qrshl_u32_armeb +#define gen_helper_neon_qrshl_u64 gen_helper_neon_qrshl_u64_armeb +#define gen_helper_neon_qrshl_u8 gen_helper_neon_qrshl_u8_armeb +#define gen_helper_neon_qshl_s16 gen_helper_neon_qshl_s16_armeb +#define gen_helper_neon_qshl_s32 gen_helper_neon_qshl_s32_armeb +#define gen_helper_neon_qshl_s64 gen_helper_neon_qshl_s64_armeb +#define gen_helper_neon_qshl_s8 gen_helper_neon_qshl_s8_armeb +#define gen_helper_neon_qshl_u16 gen_helper_neon_qshl_u16_armeb +#define gen_helper_neon_qshl_u32 gen_helper_neon_qshl_u32_armeb +#define gen_helper_neon_qshl_u64 gen_helper_neon_qshl_u64_armeb +#define gen_helper_neon_qshl_u8 gen_helper_neon_qshl_u8_armeb +#define gen_helper_neon_qshlu_s16 gen_helper_neon_qshlu_s16_armeb +#define gen_helper_neon_qshlu_s32 gen_helper_neon_qshlu_s32_armeb +#define gen_helper_neon_qshlu_s64 gen_helper_neon_qshlu_s64_armeb +#define gen_helper_neon_qshlu_s8 gen_helper_neon_qshlu_s8_armeb +#define gen_helper_neon_qsub_s16 gen_helper_neon_qsub_s16_armeb +#define gen_helper_neon_qsub_s32 gen_helper_neon_qsub_s32_armeb +#define gen_helper_neon_qsub_s64 gen_helper_neon_qsub_s64_armeb +#define gen_helper_neon_qsub_s8 gen_helper_neon_qsub_s8_armeb +#define gen_helper_neon_qsub_u16 gen_helper_neon_qsub_u16_armeb +#define gen_helper_neon_qsub_u32 gen_helper_neon_qsub_u32_armeb +#define gen_helper_neon_qsub_u64 gen_helper_neon_qsub_u64_armeb +#define gen_helper_neon_qsub_u8 gen_helper_neon_qsub_u8_armeb +#define gen_helper_neon_qunzip16 gen_helper_neon_qunzip16_armeb +#define gen_helper_neon_qunzip32 gen_helper_neon_qunzip32_armeb +#define gen_helper_neon_qunzip8 gen_helper_neon_qunzip8_armeb +#define gen_helper_neon_qzip16 gen_helper_neon_qzip16_armeb +#define gen_helper_neon_qzip32 gen_helper_neon_qzip32_armeb +#define gen_helper_neon_qzip8 gen_helper_neon_qzip8_armeb +#define gen_helper_neon_rhadd_s16 gen_helper_neon_rhadd_s16_armeb +#define gen_helper_neon_rhadd_s32 gen_helper_neon_rhadd_s32_armeb +#define gen_helper_neon_rhadd_s8 gen_helper_neon_rhadd_s8_armeb +#define gen_helper_neon_rhadd_u16 gen_helper_neon_rhadd_u16_armeb +#define gen_helper_neon_rhadd_u32 gen_helper_neon_rhadd_u32_armeb +#define gen_helper_neon_rhadd_u8 gen_helper_neon_rhadd_u8_armeb +#define gen_helper_neon_rshl_s16 gen_helper_neon_rshl_s16_armeb +#define gen_helper_neon_rshl_s32 gen_helper_neon_rshl_s32_armeb +#define gen_helper_neon_rshl_s64 gen_helper_neon_rshl_s64_armeb +#define gen_helper_neon_rshl_s8 gen_helper_neon_rshl_s8_armeb +#define gen_helper_neon_rshl_u16 gen_helper_neon_rshl_u16_armeb +#define gen_helper_neon_rshl_u32 gen_helper_neon_rshl_u32_armeb +#define gen_helper_neon_rshl_u64 gen_helper_neon_rshl_u64_armeb +#define gen_helper_neon_rshl_u8 gen_helper_neon_rshl_u8_armeb +#define gen_helper_neon_shl_s16 gen_helper_neon_shl_s16_armeb +#define gen_helper_neon_shl_s32 gen_helper_neon_shl_s32_armeb +#define gen_helper_neon_shl_s64 gen_helper_neon_shl_s64_armeb +#define gen_helper_neon_shl_s8 gen_helper_neon_shl_s8_armeb +#define gen_helper_neon_shl_u16 gen_helper_neon_shl_u16_armeb +#define gen_helper_neon_shl_u32 gen_helper_neon_shl_u32_armeb +#define gen_helper_neon_shl_u64 gen_helper_neon_shl_u64_armeb +#define gen_helper_neon_shl_u8 gen_helper_neon_shl_u8_armeb +#define gen_helper_neon_subl_u16 gen_helper_neon_subl_u16_armeb +#define gen_helper_neon_subl_u32 gen_helper_neon_subl_u32_armeb +#define gen_helper_neon_sub_u16 gen_helper_neon_sub_u16_armeb +#define gen_helper_neon_sub_u8 gen_helper_neon_sub_u8_armeb +#define gen_helper_neon_tbl gen_helper_neon_tbl_armeb +#define gen_helper_neon_tst_u16 gen_helper_neon_tst_u16_armeb +#define gen_helper_neon_tst_u32 gen_helper_neon_tst_u32_armeb +#define gen_helper_neon_tst_u8 gen_helper_neon_tst_u8_armeb +#define gen_helper_neon_unarrow_sat16 gen_helper_neon_unarrow_sat16_armeb +#define gen_helper_neon_unarrow_sat32 gen_helper_neon_unarrow_sat32_armeb +#define gen_helper_neon_unarrow_sat8 gen_helper_neon_unarrow_sat8_armeb +#define gen_helper_neon_unzip16 gen_helper_neon_unzip16_armeb +#define gen_helper_neon_unzip8 gen_helper_neon_unzip8_armeb +#define gen_helper_neon_widen_s16 gen_helper_neon_widen_s16_armeb +#define gen_helper_neon_widen_s8 gen_helper_neon_widen_s8_armeb +#define gen_helper_neon_widen_u16 gen_helper_neon_widen_u16_armeb +#define gen_helper_neon_widen_u8 gen_helper_neon_widen_u8_armeb +#define gen_helper_neon_zip16 gen_helper_neon_zip16_armeb +#define gen_helper_neon_zip8 gen_helper_neon_zip8_armeb +#define gen_helper_pre_hvc gen_helper_pre_hvc_armeb +#define gen_helper_pre_smc gen_helper_pre_smc_armeb +#define gen_helper_qadd16 gen_helper_qadd16_armeb +#define gen_helper_qadd8 gen_helper_qadd8_armeb +#define gen_helper_qaddsubx gen_helper_qaddsubx_armeb +#define gen_helper_qsub16 gen_helper_qsub16_armeb +#define gen_helper_qsub8 gen_helper_qsub8_armeb +#define gen_helper_qsubaddx gen_helper_qsubaddx_armeb +#define gen_helper_rbit gen_helper_rbit_armeb +#define gen_helper_recpe_f32 gen_helper_recpe_f32_armeb +#define gen_helper_recpe_u32 gen_helper_recpe_u32_armeb +#define gen_helper_recps_f32 gen_helper_recps_f32_armeb +#define gen_helper_rintd gen_helper_rintd_armeb +#define gen_helper_rintd_exact gen_helper_rintd_exact_armeb +#define gen_helper_rints gen_helper_rints_armeb +#define gen_helper_rints_exact gen_helper_rints_exact_armeb +#define gen_helper_ror_cc gen_helper_ror_cc_armeb +#define gen_helper_rsqrte_f32 gen_helper_rsqrte_f32_armeb +#define gen_helper_rsqrte_u32 gen_helper_rsqrte_u32_armeb +#define gen_helper_rsqrts_f32 gen_helper_rsqrts_f32_armeb +#define gen_helper_sadd16 gen_helper_sadd16_armeb +#define gen_helper_sadd8 gen_helper_sadd8_armeb +#define gen_helper_saddsubx gen_helper_saddsubx_armeb +#define gen_helper_sar_cc gen_helper_sar_cc_armeb +#define gen_helper_sdiv gen_helper_sdiv_armeb +#define gen_helper_sel_flags gen_helper_sel_flags_armeb +#define gen_helper_set_cp_reg gen_helper_set_cp_reg_armeb +#define gen_helper_set_cp_reg64 gen_helper_set_cp_reg64_armeb +#define gen_helper_set_neon_rmode gen_helper_set_neon_rmode_armeb +#define gen_helper_set_r13_banked gen_helper_set_r13_banked_armeb +#define gen_helper_set_rmode gen_helper_set_rmode_armeb +#define gen_helper_set_user_reg gen_helper_set_user_reg_armeb +#define gen_helper_shadd16 gen_helper_shadd16_armeb +#define gen_helper_shadd8 gen_helper_shadd8_armeb +#define gen_helper_shaddsubx gen_helper_shaddsubx_armeb +#define gen_helper_shl_cc gen_helper_shl_cc_armeb +#define gen_helper_shr_cc gen_helper_shr_cc_armeb +#define gen_helper_shsub16 gen_helper_shsub16_armeb +#define gen_helper_shsub8 gen_helper_shsub8_armeb +#define gen_helper_shsubaddx gen_helper_shsubaddx_armeb +#define gen_helper_ssat gen_helper_ssat_armeb +#define gen_helper_ssat16 gen_helper_ssat16_armeb +#define gen_helper_ssub16 gen_helper_ssub16_armeb +#define gen_helper_ssub8 gen_helper_ssub8_armeb +#define gen_helper_ssubaddx gen_helper_ssubaddx_armeb +#define gen_helper_sub_saturate gen_helper_sub_saturate_armeb +#define gen_helper_sxtb16 gen_helper_sxtb16_armeb +#define gen_helper_uadd16 gen_helper_uadd16_armeb +#define gen_helper_uadd8 gen_helper_uadd8_armeb +#define gen_helper_uaddsubx gen_helper_uaddsubx_armeb +#define gen_helper_udiv gen_helper_udiv_armeb +#define gen_helper_uhadd16 gen_helper_uhadd16_armeb +#define gen_helper_uhadd8 gen_helper_uhadd8_armeb +#define gen_helper_uhaddsubx gen_helper_uhaddsubx_armeb +#define gen_helper_uhsub16 gen_helper_uhsub16_armeb +#define gen_helper_uhsub8 gen_helper_uhsub8_armeb +#define gen_helper_uhsubaddx gen_helper_uhsubaddx_armeb +#define gen_helper_uqadd16 gen_helper_uqadd16_armeb +#define gen_helper_uqadd8 gen_helper_uqadd8_armeb +#define gen_helper_uqaddsubx gen_helper_uqaddsubx_armeb +#define gen_helper_uqsub16 gen_helper_uqsub16_armeb +#define gen_helper_uqsub8 gen_helper_uqsub8_armeb +#define gen_helper_uqsubaddx gen_helper_uqsubaddx_armeb +#define gen_helper_usad8 gen_helper_usad8_armeb +#define gen_helper_usat gen_helper_usat_armeb +#define gen_helper_usat16 gen_helper_usat16_armeb +#define gen_helper_usub16 gen_helper_usub16_armeb +#define gen_helper_usub8 gen_helper_usub8_armeb +#define gen_helper_usubaddx gen_helper_usubaddx_armeb +#define gen_helper_uxtb16 gen_helper_uxtb16_armeb +#define gen_helper_v7m_mrs gen_helper_v7m_mrs_armeb +#define gen_helper_v7m_msr gen_helper_v7m_msr_armeb +#define gen_helper_vfp_absd gen_helper_vfp_absd_armeb +#define gen_helper_vfp_abss gen_helper_vfp_abss_armeb +#define gen_helper_vfp_addd gen_helper_vfp_addd_armeb +#define gen_helper_vfp_adds gen_helper_vfp_adds_armeb +#define gen_helper_vfp_cmpd gen_helper_vfp_cmpd_armeb +#define gen_helper_vfp_cmped gen_helper_vfp_cmped_armeb +#define gen_helper_vfp_cmpes gen_helper_vfp_cmpes_armeb +#define gen_helper_vfp_cmps gen_helper_vfp_cmps_armeb +#define gen_helper_vfp_divd gen_helper_vfp_divd_armeb +#define gen_helper_vfp_divs gen_helper_vfp_divs_armeb +#define gen_helper_vfp_fcvtds gen_helper_vfp_fcvtds_armeb +#define gen_helper_vfp_fcvt_f16_to_f32 gen_helper_vfp_fcvt_f16_to_f32_armeb +#define gen_helper_vfp_fcvt_f16_to_f64 gen_helper_vfp_fcvt_f16_to_f64_armeb +#define gen_helper_vfp_fcvt_f32_to_f16 gen_helper_vfp_fcvt_f32_to_f16_armeb +#define gen_helper_vfp_fcvt_f64_to_f16 gen_helper_vfp_fcvt_f64_to_f16_armeb +#define gen_helper_vfp_fcvtsd gen_helper_vfp_fcvtsd_armeb +#define gen_helper_vfp_get_fpscr gen_helper_vfp_get_fpscr_armeb +#define gen_helper_vfp_maxnumd gen_helper_vfp_maxnumd_armeb +#define gen_helper_vfp_maxnums gen_helper_vfp_maxnums_armeb +#define gen_helper_vfp_maxs gen_helper_vfp_maxs_armeb +#define gen_helper_vfp_minnumd gen_helper_vfp_minnumd_armeb +#define gen_helper_vfp_minnums gen_helper_vfp_minnums_armeb +#define gen_helper_vfp_mins gen_helper_vfp_mins_armeb +#define gen_helper_vfp_muladdd gen_helper_vfp_muladdd_armeb +#define gen_helper_vfp_muladds gen_helper_vfp_muladds_armeb +#define gen_helper_vfp_muld gen_helper_vfp_muld_armeb +#define gen_helper_vfp_muls gen_helper_vfp_muls_armeb +#define gen_helper_vfp_negd gen_helper_vfp_negd_armeb +#define gen_helper_vfp_negs gen_helper_vfp_negs_armeb +#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_armeb +#define gen_helper_vfp_shtod gen_helper_vfp_shtod_armeb +#define gen_helper_vfp_shtos gen_helper_vfp_shtos_armeb +#define gen_helper_vfp_sitod gen_helper_vfp_sitod_armeb +#define gen_helper_vfp_sitos gen_helper_vfp_sitos_armeb +#define gen_helper_vfp_sltod gen_helper_vfp_sltod_armeb +#define gen_helper_vfp_sltos gen_helper_vfp_sltos_armeb +#define gen_helper_vfp_sqrtd gen_helper_vfp_sqrtd_armeb +#define gen_helper_vfp_sqrts gen_helper_vfp_sqrts_armeb +#define gen_helper_vfp_subd gen_helper_vfp_subd_armeb +#define gen_helper_vfp_subs gen_helper_vfp_subs_armeb +#define gen_helper_vfp_toshd_round_to_zero gen_helper_vfp_toshd_round_to_zero_armeb +#define gen_helper_vfp_toshs_round_to_zero gen_helper_vfp_toshs_round_to_zero_armeb +#define gen_helper_vfp_tosid gen_helper_vfp_tosid_armeb +#define gen_helper_vfp_tosis gen_helper_vfp_tosis_armeb +#define gen_helper_vfp_tosizd gen_helper_vfp_tosizd_armeb +#define gen_helper_vfp_tosizs gen_helper_vfp_tosizs_armeb +#define gen_helper_vfp_tosld gen_helper_vfp_tosld_armeb +#define gen_helper_vfp_tosld_round_to_zero gen_helper_vfp_tosld_round_to_zero_armeb +#define gen_helper_vfp_tosls gen_helper_vfp_tosls_armeb +#define gen_helper_vfp_tosls_round_to_zero gen_helper_vfp_tosls_round_to_zero_armeb +#define gen_helper_vfp_touhd_round_to_zero gen_helper_vfp_touhd_round_to_zero_armeb +#define gen_helper_vfp_touhs_round_to_zero gen_helper_vfp_touhs_round_to_zero_armeb +#define gen_helper_vfp_touid gen_helper_vfp_touid_armeb +#define gen_helper_vfp_touis gen_helper_vfp_touis_armeb +#define gen_helper_vfp_touizd gen_helper_vfp_touizd_armeb +#define gen_helper_vfp_touizs gen_helper_vfp_touizs_armeb +#define gen_helper_vfp_tould gen_helper_vfp_tould_armeb +#define gen_helper_vfp_tould_round_to_zero gen_helper_vfp_tould_round_to_zero_armeb +#define gen_helper_vfp_touls gen_helper_vfp_touls_armeb +#define gen_helper_vfp_touls_round_to_zero gen_helper_vfp_touls_round_to_zero_armeb +#define gen_helper_vfp_uhtod gen_helper_vfp_uhtod_armeb +#define gen_helper_vfp_uhtos gen_helper_vfp_uhtos_armeb +#define gen_helper_vfp_uitod gen_helper_vfp_uitod_armeb +#define gen_helper_vfp_uitos gen_helper_vfp_uitos_armeb +#define gen_helper_vfp_ultod gen_helper_vfp_ultod_armeb +#define gen_helper_vfp_ultos gen_helper_vfp_ultos_armeb +#define gen_helper_wfe gen_helper_wfe_armeb +#define gen_helper_wfi gen_helper_wfi_armeb +#define gen_hvc gen_hvc_armeb +#define gen_intermediate_code_internal gen_intermediate_code_internal_armeb +#define gen_intermediate_code_internal_a64 gen_intermediate_code_internal_a64_armeb +#define gen_iwmmxt_address gen_iwmmxt_address_armeb +#define gen_iwmmxt_shift gen_iwmmxt_shift_armeb +#define gen_jmp gen_jmp_armeb +#define gen_load_and_replicate gen_load_and_replicate_armeb +#define gen_load_exclusive gen_load_exclusive_armeb +#define gen_logic_CC gen_logic_CC_armeb +#define gen_logicq_cc gen_logicq_cc_armeb +#define gen_lookup_tb gen_lookup_tb_armeb +#define gen_mov_F0_vreg gen_mov_F0_vreg_armeb +#define gen_mov_F1_vreg gen_mov_F1_vreg_armeb +#define gen_mov_vreg_F0 gen_mov_vreg_F0_armeb +#define gen_muls_i64_i32 gen_muls_i64_i32_armeb +#define gen_mulu_i64_i32 gen_mulu_i64_i32_armeb +#define gen_mulxy gen_mulxy_armeb +#define gen_neon_add gen_neon_add_armeb +#define gen_neon_addl gen_neon_addl_armeb +#define gen_neon_addl_saturate gen_neon_addl_saturate_armeb +#define gen_neon_bsl gen_neon_bsl_armeb +#define gen_neon_dup_high16 gen_neon_dup_high16_armeb +#define gen_neon_dup_low16 gen_neon_dup_low16_armeb +#define gen_neon_dup_u8 gen_neon_dup_u8_armeb +#define gen_neon_mull gen_neon_mull_armeb +#define gen_neon_narrow gen_neon_narrow_armeb +#define gen_neon_narrow_op gen_neon_narrow_op_armeb +#define gen_neon_narrow_sats gen_neon_narrow_sats_armeb +#define gen_neon_narrow_satu gen_neon_narrow_satu_armeb +#define gen_neon_negl gen_neon_negl_armeb +#define gen_neon_rsb gen_neon_rsb_armeb +#define gen_neon_shift_narrow gen_neon_shift_narrow_armeb +#define gen_neon_subl gen_neon_subl_armeb +#define gen_neon_trn_u16 gen_neon_trn_u16_armeb +#define gen_neon_trn_u8 gen_neon_trn_u8_armeb +#define gen_neon_unarrow_sats gen_neon_unarrow_sats_armeb +#define gen_neon_unzip gen_neon_unzip_armeb +#define gen_neon_widen gen_neon_widen_armeb +#define gen_neon_zip gen_neon_zip_armeb +#define gen_new_label gen_new_label_armeb +#define gen_nop_hint gen_nop_hint_armeb +#define gen_op_iwmmxt_addl_M0_wRn gen_op_iwmmxt_addl_M0_wRn_armeb +#define gen_op_iwmmxt_addnb_M0_wRn gen_op_iwmmxt_addnb_M0_wRn_armeb +#define gen_op_iwmmxt_addnl_M0_wRn gen_op_iwmmxt_addnl_M0_wRn_armeb +#define gen_op_iwmmxt_addnw_M0_wRn gen_op_iwmmxt_addnw_M0_wRn_armeb +#define gen_op_iwmmxt_addsb_M0_wRn gen_op_iwmmxt_addsb_M0_wRn_armeb +#define gen_op_iwmmxt_addsl_M0_wRn gen_op_iwmmxt_addsl_M0_wRn_armeb +#define gen_op_iwmmxt_addsw_M0_wRn gen_op_iwmmxt_addsw_M0_wRn_armeb +#define gen_op_iwmmxt_addub_M0_wRn gen_op_iwmmxt_addub_M0_wRn_armeb +#define gen_op_iwmmxt_addul_M0_wRn gen_op_iwmmxt_addul_M0_wRn_armeb +#define gen_op_iwmmxt_adduw_M0_wRn gen_op_iwmmxt_adduw_M0_wRn_armeb +#define gen_op_iwmmxt_andq_M0_wRn gen_op_iwmmxt_andq_M0_wRn_armeb +#define gen_op_iwmmxt_avgb0_M0_wRn gen_op_iwmmxt_avgb0_M0_wRn_armeb +#define gen_op_iwmmxt_avgb1_M0_wRn gen_op_iwmmxt_avgb1_M0_wRn_armeb +#define gen_op_iwmmxt_avgw0_M0_wRn gen_op_iwmmxt_avgw0_M0_wRn_armeb +#define gen_op_iwmmxt_avgw1_M0_wRn gen_op_iwmmxt_avgw1_M0_wRn_armeb +#define gen_op_iwmmxt_cmpeqb_M0_wRn gen_op_iwmmxt_cmpeqb_M0_wRn_armeb +#define gen_op_iwmmxt_cmpeql_M0_wRn gen_op_iwmmxt_cmpeql_M0_wRn_armeb +#define gen_op_iwmmxt_cmpeqw_M0_wRn gen_op_iwmmxt_cmpeqw_M0_wRn_armeb +#define gen_op_iwmmxt_cmpgtsb_M0_wRn gen_op_iwmmxt_cmpgtsb_M0_wRn_armeb +#define gen_op_iwmmxt_cmpgtsl_M0_wRn gen_op_iwmmxt_cmpgtsl_M0_wRn_armeb +#define gen_op_iwmmxt_cmpgtsw_M0_wRn gen_op_iwmmxt_cmpgtsw_M0_wRn_armeb +#define gen_op_iwmmxt_cmpgtub_M0_wRn gen_op_iwmmxt_cmpgtub_M0_wRn_armeb +#define gen_op_iwmmxt_cmpgtul_M0_wRn gen_op_iwmmxt_cmpgtul_M0_wRn_armeb +#define gen_op_iwmmxt_cmpgtuw_M0_wRn gen_op_iwmmxt_cmpgtuw_M0_wRn_armeb +#define gen_op_iwmmxt_macsw_M0_wRn gen_op_iwmmxt_macsw_M0_wRn_armeb +#define gen_op_iwmmxt_macuw_M0_wRn gen_op_iwmmxt_macuw_M0_wRn_armeb +#define gen_op_iwmmxt_maddsq_M0_wRn gen_op_iwmmxt_maddsq_M0_wRn_armeb +#define gen_op_iwmmxt_madduq_M0_wRn gen_op_iwmmxt_madduq_M0_wRn_armeb +#define gen_op_iwmmxt_maxsb_M0_wRn gen_op_iwmmxt_maxsb_M0_wRn_armeb +#define gen_op_iwmmxt_maxsl_M0_wRn gen_op_iwmmxt_maxsl_M0_wRn_armeb +#define gen_op_iwmmxt_maxsw_M0_wRn gen_op_iwmmxt_maxsw_M0_wRn_armeb +#define gen_op_iwmmxt_maxub_M0_wRn gen_op_iwmmxt_maxub_M0_wRn_armeb +#define gen_op_iwmmxt_maxul_M0_wRn gen_op_iwmmxt_maxul_M0_wRn_armeb +#define gen_op_iwmmxt_maxuw_M0_wRn gen_op_iwmmxt_maxuw_M0_wRn_armeb +#define gen_op_iwmmxt_minsb_M0_wRn gen_op_iwmmxt_minsb_M0_wRn_armeb +#define gen_op_iwmmxt_minsl_M0_wRn gen_op_iwmmxt_minsl_M0_wRn_armeb +#define gen_op_iwmmxt_minsw_M0_wRn gen_op_iwmmxt_minsw_M0_wRn_armeb +#define gen_op_iwmmxt_minub_M0_wRn gen_op_iwmmxt_minub_M0_wRn_armeb +#define gen_op_iwmmxt_minul_M0_wRn gen_op_iwmmxt_minul_M0_wRn_armeb +#define gen_op_iwmmxt_minuw_M0_wRn gen_op_iwmmxt_minuw_M0_wRn_armeb +#define gen_op_iwmmxt_movq_M0_wRn gen_op_iwmmxt_movq_M0_wRn_armeb +#define gen_op_iwmmxt_movq_wRn_M0 gen_op_iwmmxt_movq_wRn_M0_armeb +#define gen_op_iwmmxt_mulshw_M0_wRn gen_op_iwmmxt_mulshw_M0_wRn_armeb +#define gen_op_iwmmxt_mulslw_M0_wRn gen_op_iwmmxt_mulslw_M0_wRn_armeb +#define gen_op_iwmmxt_muluhw_M0_wRn gen_op_iwmmxt_muluhw_M0_wRn_armeb +#define gen_op_iwmmxt_mululw_M0_wRn gen_op_iwmmxt_mululw_M0_wRn_armeb +#define gen_op_iwmmxt_orq_M0_wRn gen_op_iwmmxt_orq_M0_wRn_armeb +#define gen_op_iwmmxt_packsl_M0_wRn gen_op_iwmmxt_packsl_M0_wRn_armeb +#define gen_op_iwmmxt_packsq_M0_wRn gen_op_iwmmxt_packsq_M0_wRn_armeb +#define gen_op_iwmmxt_packsw_M0_wRn gen_op_iwmmxt_packsw_M0_wRn_armeb +#define gen_op_iwmmxt_packul_M0_wRn gen_op_iwmmxt_packul_M0_wRn_armeb +#define gen_op_iwmmxt_packuq_M0_wRn gen_op_iwmmxt_packuq_M0_wRn_armeb +#define gen_op_iwmmxt_packuw_M0_wRn gen_op_iwmmxt_packuw_M0_wRn_armeb +#define gen_op_iwmmxt_sadb_M0_wRn gen_op_iwmmxt_sadb_M0_wRn_armeb +#define gen_op_iwmmxt_sadw_M0_wRn gen_op_iwmmxt_sadw_M0_wRn_armeb +#define gen_op_iwmmxt_set_cup gen_op_iwmmxt_set_cup_armeb +#define gen_op_iwmmxt_set_mup gen_op_iwmmxt_set_mup_armeb +#define gen_op_iwmmxt_setpsr_nz gen_op_iwmmxt_setpsr_nz_armeb +#define gen_op_iwmmxt_subnb_M0_wRn gen_op_iwmmxt_subnb_M0_wRn_armeb +#define gen_op_iwmmxt_subnl_M0_wRn gen_op_iwmmxt_subnl_M0_wRn_armeb +#define gen_op_iwmmxt_subnw_M0_wRn gen_op_iwmmxt_subnw_M0_wRn_armeb +#define gen_op_iwmmxt_subsb_M0_wRn gen_op_iwmmxt_subsb_M0_wRn_armeb +#define gen_op_iwmmxt_subsl_M0_wRn gen_op_iwmmxt_subsl_M0_wRn_armeb +#define gen_op_iwmmxt_subsw_M0_wRn gen_op_iwmmxt_subsw_M0_wRn_armeb +#define gen_op_iwmmxt_subub_M0_wRn gen_op_iwmmxt_subub_M0_wRn_armeb +#define gen_op_iwmmxt_subul_M0_wRn gen_op_iwmmxt_subul_M0_wRn_armeb +#define gen_op_iwmmxt_subuw_M0_wRn gen_op_iwmmxt_subuw_M0_wRn_armeb +#define gen_op_iwmmxt_unpackhb_M0_wRn gen_op_iwmmxt_unpackhb_M0_wRn_armeb +#define gen_op_iwmmxt_unpackhl_M0_wRn gen_op_iwmmxt_unpackhl_M0_wRn_armeb +#define gen_op_iwmmxt_unpackhsb_M0 gen_op_iwmmxt_unpackhsb_M0_armeb +#define gen_op_iwmmxt_unpackhsl_M0 gen_op_iwmmxt_unpackhsl_M0_armeb +#define gen_op_iwmmxt_unpackhsw_M0 gen_op_iwmmxt_unpackhsw_M0_armeb +#define gen_op_iwmmxt_unpackhub_M0 gen_op_iwmmxt_unpackhub_M0_armeb +#define gen_op_iwmmxt_unpackhul_M0 gen_op_iwmmxt_unpackhul_M0_armeb +#define gen_op_iwmmxt_unpackhuw_M0 gen_op_iwmmxt_unpackhuw_M0_armeb +#define gen_op_iwmmxt_unpackhw_M0_wRn gen_op_iwmmxt_unpackhw_M0_wRn_armeb +#define gen_op_iwmmxt_unpacklb_M0_wRn gen_op_iwmmxt_unpacklb_M0_wRn_armeb +#define gen_op_iwmmxt_unpackll_M0_wRn gen_op_iwmmxt_unpackll_M0_wRn_armeb +#define gen_op_iwmmxt_unpacklsb_M0 gen_op_iwmmxt_unpacklsb_M0_armeb +#define gen_op_iwmmxt_unpacklsl_M0 gen_op_iwmmxt_unpacklsl_M0_armeb +#define gen_op_iwmmxt_unpacklsw_M0 gen_op_iwmmxt_unpacklsw_M0_armeb +#define gen_op_iwmmxt_unpacklub_M0 gen_op_iwmmxt_unpacklub_M0_armeb +#define gen_op_iwmmxt_unpacklul_M0 gen_op_iwmmxt_unpacklul_M0_armeb +#define gen_op_iwmmxt_unpackluw_M0 gen_op_iwmmxt_unpackluw_M0_armeb +#define gen_op_iwmmxt_unpacklw_M0_wRn gen_op_iwmmxt_unpacklw_M0_wRn_armeb +#define gen_op_iwmmxt_xorq_M0_wRn gen_op_iwmmxt_xorq_M0_wRn_armeb +#define gen_rev16 gen_rev16_armeb +#define gen_revsh gen_revsh_armeb +#define gen_rfe gen_rfe_armeb +#define gen_sar gen_sar_armeb +#define gen_sbc_CC gen_sbc_CC_armeb +#define gen_sbfx gen_sbfx_armeb +#define gen_set_CF_bit31 gen_set_CF_bit31_armeb +#define gen_set_condexec gen_set_condexec_armeb +#define gen_set_cpsr gen_set_cpsr_armeb +#define gen_set_label gen_set_label_armeb +#define gen_set_pc_im gen_set_pc_im_armeb +#define gen_set_psr gen_set_psr_armeb +#define gen_set_psr_im gen_set_psr_im_armeb +#define gen_shl gen_shl_armeb +#define gen_shr gen_shr_armeb +#define gen_smc gen_smc_armeb +#define gen_smul_dual gen_smul_dual_armeb +#define gen_srs gen_srs_armeb +#define gen_ss_advance gen_ss_advance_armeb +#define gen_step_complete_exception gen_step_complete_exception_armeb +#define gen_store_exclusive gen_store_exclusive_armeb +#define gen_storeq_reg gen_storeq_reg_armeb +#define gen_sub_carry gen_sub_carry_armeb +#define gen_sub_CC gen_sub_CC_armeb +#define gen_subq_msw gen_subq_msw_armeb +#define gen_swap_half gen_swap_half_armeb +#define gen_thumb2_data_op gen_thumb2_data_op_armeb +#define gen_thumb2_parallel_addsub gen_thumb2_parallel_addsub_armeb +#define gen_ubfx gen_ubfx_armeb +#define gen_vfp_abs gen_vfp_abs_armeb +#define gen_vfp_add gen_vfp_add_armeb +#define gen_vfp_cmp gen_vfp_cmp_armeb +#define gen_vfp_cmpe gen_vfp_cmpe_armeb +#define gen_vfp_div gen_vfp_div_armeb +#define gen_vfp_F1_ld0 gen_vfp_F1_ld0_armeb +#define gen_vfp_F1_mul gen_vfp_F1_mul_armeb +#define gen_vfp_F1_neg gen_vfp_F1_neg_armeb +#define gen_vfp_ld gen_vfp_ld_armeb +#define gen_vfp_mrs gen_vfp_mrs_armeb +#define gen_vfp_msr gen_vfp_msr_armeb +#define gen_vfp_mul gen_vfp_mul_armeb +#define gen_vfp_neg gen_vfp_neg_armeb +#define gen_vfp_shto gen_vfp_shto_armeb +#define gen_vfp_sito gen_vfp_sito_armeb +#define gen_vfp_slto gen_vfp_slto_armeb +#define gen_vfp_sqrt gen_vfp_sqrt_armeb +#define gen_vfp_st gen_vfp_st_armeb +#define gen_vfp_sub gen_vfp_sub_armeb +#define gen_vfp_tosh gen_vfp_tosh_armeb +#define gen_vfp_tosi gen_vfp_tosi_armeb +#define gen_vfp_tosiz gen_vfp_tosiz_armeb +#define gen_vfp_tosl gen_vfp_tosl_armeb +#define gen_vfp_touh gen_vfp_touh_armeb +#define gen_vfp_toui gen_vfp_toui_armeb +#define gen_vfp_touiz gen_vfp_touiz_armeb +#define gen_vfp_toul gen_vfp_toul_armeb +#define gen_vfp_uhto gen_vfp_uhto_armeb +#define gen_vfp_uito gen_vfp_uito_armeb +#define gen_vfp_ulto gen_vfp_ulto_armeb +#define get_armeb_cp_reginfo get_armeb_cp_reginfo_armeb +#define get_clock get_clock_armeb +#define get_clock_realtime get_clock_realtime_armeb +#define get_constraint_priority get_constraint_priority_armeb +#define get_float_exception_flags get_float_exception_flags_armeb +#define get_float_rounding_mode get_float_rounding_mode_armeb +#define get_fpstatus_ptr get_fpstatus_ptr_armeb +#define get_level1_table_address get_level1_table_address_armeb +#define get_mem_index get_mem_index_armeb +#define get_next_param_value get_next_param_value_armeb +#define get_opt_name get_opt_name_armeb +#define get_opt_value get_opt_value_armeb +#define get_page_addr_code get_page_addr_code_armeb +#define get_param_value get_param_value_armeb +#define get_phys_addr get_phys_addr_armeb +#define get_phys_addr_lpae get_phys_addr_lpae_armeb +#define get_phys_addr_mpu get_phys_addr_mpu_armeb +#define get_phys_addr_v5 get_phys_addr_v5_armeb +#define get_phys_addr_v6 get_phys_addr_v6_armeb +#define get_system_memory get_system_memory_armeb +#define get_ticks_per_sec get_ticks_per_sec_armeb +#define g_list_insert_sorted_merged g_list_insert_sorted_merged_armeb +#define _GLOBAL_OFFSET_TABLE_ _GLOBAL_OFFSET_TABLE__armeb +#define gt_cntfrq_access gt_cntfrq_access_armeb +#define gt_cnt_read gt_cnt_read_armeb +#define gt_cnt_reset gt_cnt_reset_armeb +#define gt_counter_access gt_counter_access_armeb +#define gt_ctl_write gt_ctl_write_armeb +#define gt_cval_write gt_cval_write_armeb +#define gt_get_countervalue gt_get_countervalue_armeb +#define gt_pct_access gt_pct_access_armeb +#define gt_ptimer_access gt_ptimer_access_armeb +#define gt_recalc_timer gt_recalc_timer_armeb +#define gt_timer_access gt_timer_access_armeb +#define gt_tval_read gt_tval_read_armeb +#define gt_tval_write gt_tval_write_armeb +#define gt_vct_access gt_vct_access_armeb +#define gt_vtimer_access gt_vtimer_access_armeb +#define guest_phys_blocks_free guest_phys_blocks_free_armeb +#define guest_phys_blocks_init guest_phys_blocks_init_armeb +#define handle_vcvt handle_vcvt_armeb +#define handle_vminmaxnm handle_vminmaxnm_armeb +#define handle_vrint handle_vrint_armeb +#define handle_vsel handle_vsel_armeb +#define has_help_option has_help_option_armeb +#define have_bmi1 have_bmi1_armeb +#define have_bmi2 have_bmi2_armeb +#define hcr_write hcr_write_armeb +#define helper_access_check_cp_reg helper_access_check_cp_reg_armeb +#define helper_add_saturate helper_add_saturate_armeb +#define helper_add_setq helper_add_setq_armeb +#define helper_add_usaturate helper_add_usaturate_armeb +#define helper_be_ldl_cmmu helper_be_ldl_cmmu_armeb +#define helper_be_ldq_cmmu helper_be_ldq_cmmu_armeb +#define helper_be_ldq_mmu helper_be_ldq_mmu_armeb +#define helper_be_ldsl_mmu helper_be_ldsl_mmu_armeb +#define helper_be_ldsw_mmu helper_be_ldsw_mmu_armeb +#define helper_be_ldul_mmu helper_be_ldul_mmu_armeb +#define helper_be_lduw_mmu helper_be_lduw_mmu_armeb +#define helper_be_ldw_cmmu helper_be_ldw_cmmu_armeb +#define helper_be_stl_mmu helper_be_stl_mmu_armeb +#define helper_be_stq_mmu helper_be_stq_mmu_armeb +#define helper_be_stw_mmu helper_be_stw_mmu_armeb +#define helper_clear_pstate_ss helper_clear_pstate_ss_armeb +#define helper_clz_armeb helper_clz_armeb_armeb +#define helper_cpsr_read helper_cpsr_read_armeb +#define helper_cpsr_write helper_cpsr_write_armeb +#define helper_crc32_armeb helper_crc32_armeb_armeb +#define helper_crc32c helper_crc32c_armeb +#define helper_crypto_aese helper_crypto_aese_armeb +#define helper_crypto_aesmc helper_crypto_aesmc_armeb +#define helper_crypto_sha1_3reg helper_crypto_sha1_3reg_armeb +#define helper_crypto_sha1h helper_crypto_sha1h_armeb +#define helper_crypto_sha1su1 helper_crypto_sha1su1_armeb +#define helper_crypto_sha256h helper_crypto_sha256h_armeb +#define helper_crypto_sha256h2 helper_crypto_sha256h2_armeb +#define helper_crypto_sha256su0 helper_crypto_sha256su0_armeb +#define helper_crypto_sha256su1 helper_crypto_sha256su1_armeb +#define helper_dc_zva helper_dc_zva_armeb +#define helper_double_saturate helper_double_saturate_armeb +#define helper_exception_internal helper_exception_internal_armeb +#define helper_exception_return helper_exception_return_armeb +#define helper_exception_with_syndrome helper_exception_with_syndrome_armeb +#define helper_get_cp_reg helper_get_cp_reg_armeb +#define helper_get_cp_reg64 helper_get_cp_reg64_armeb +#define helper_get_r13_banked helper_get_r13_banked_armeb +#define helper_get_user_reg helper_get_user_reg_armeb +#define helper_iwmmxt_addcb helper_iwmmxt_addcb_armeb +#define helper_iwmmxt_addcl helper_iwmmxt_addcl_armeb +#define helper_iwmmxt_addcw helper_iwmmxt_addcw_armeb +#define helper_iwmmxt_addnb helper_iwmmxt_addnb_armeb +#define helper_iwmmxt_addnl helper_iwmmxt_addnl_armeb +#define helper_iwmmxt_addnw helper_iwmmxt_addnw_armeb +#define helper_iwmmxt_addsb helper_iwmmxt_addsb_armeb +#define helper_iwmmxt_addsl helper_iwmmxt_addsl_armeb +#define helper_iwmmxt_addsw helper_iwmmxt_addsw_armeb +#define helper_iwmmxt_addub helper_iwmmxt_addub_armeb +#define helper_iwmmxt_addul helper_iwmmxt_addul_armeb +#define helper_iwmmxt_adduw helper_iwmmxt_adduw_armeb +#define helper_iwmmxt_align helper_iwmmxt_align_armeb +#define helper_iwmmxt_avgb0 helper_iwmmxt_avgb0_armeb +#define helper_iwmmxt_avgb1 helper_iwmmxt_avgb1_armeb +#define helper_iwmmxt_avgw0 helper_iwmmxt_avgw0_armeb +#define helper_iwmmxt_avgw1 helper_iwmmxt_avgw1_armeb +#define helper_iwmmxt_bcstb helper_iwmmxt_bcstb_armeb +#define helper_iwmmxt_bcstl helper_iwmmxt_bcstl_armeb +#define helper_iwmmxt_bcstw helper_iwmmxt_bcstw_armeb +#define helper_iwmmxt_cmpeqb helper_iwmmxt_cmpeqb_armeb +#define helper_iwmmxt_cmpeql helper_iwmmxt_cmpeql_armeb +#define helper_iwmmxt_cmpeqw helper_iwmmxt_cmpeqw_armeb +#define helper_iwmmxt_cmpgtsb helper_iwmmxt_cmpgtsb_armeb +#define helper_iwmmxt_cmpgtsl helper_iwmmxt_cmpgtsl_armeb +#define helper_iwmmxt_cmpgtsw helper_iwmmxt_cmpgtsw_armeb +#define helper_iwmmxt_cmpgtub helper_iwmmxt_cmpgtub_armeb +#define helper_iwmmxt_cmpgtul helper_iwmmxt_cmpgtul_armeb +#define helper_iwmmxt_cmpgtuw helper_iwmmxt_cmpgtuw_armeb +#define helper_iwmmxt_insr helper_iwmmxt_insr_armeb +#define helper_iwmmxt_macsw helper_iwmmxt_macsw_armeb +#define helper_iwmmxt_macuw helper_iwmmxt_macuw_armeb +#define helper_iwmmxt_maddsq helper_iwmmxt_maddsq_armeb +#define helper_iwmmxt_madduq helper_iwmmxt_madduq_armeb +#define helper_iwmmxt_maxsb helper_iwmmxt_maxsb_armeb +#define helper_iwmmxt_maxsl helper_iwmmxt_maxsl_armeb +#define helper_iwmmxt_maxsw helper_iwmmxt_maxsw_armeb +#define helper_iwmmxt_maxub helper_iwmmxt_maxub_armeb +#define helper_iwmmxt_maxul helper_iwmmxt_maxul_armeb +#define helper_iwmmxt_maxuw helper_iwmmxt_maxuw_armeb +#define helper_iwmmxt_minsb helper_iwmmxt_minsb_armeb +#define helper_iwmmxt_minsl helper_iwmmxt_minsl_armeb +#define helper_iwmmxt_minsw helper_iwmmxt_minsw_armeb +#define helper_iwmmxt_minub helper_iwmmxt_minub_armeb +#define helper_iwmmxt_minul helper_iwmmxt_minul_armeb +#define helper_iwmmxt_minuw helper_iwmmxt_minuw_armeb +#define helper_iwmmxt_msbb helper_iwmmxt_msbb_armeb +#define helper_iwmmxt_msbl helper_iwmmxt_msbl_armeb +#define helper_iwmmxt_msbw helper_iwmmxt_msbw_armeb +#define helper_iwmmxt_muladdsl helper_iwmmxt_muladdsl_armeb +#define helper_iwmmxt_muladdsw helper_iwmmxt_muladdsw_armeb +#define helper_iwmmxt_muladdswl helper_iwmmxt_muladdswl_armeb +#define helper_iwmmxt_mulshw helper_iwmmxt_mulshw_armeb +#define helper_iwmmxt_mulslw helper_iwmmxt_mulslw_armeb +#define helper_iwmmxt_muluhw helper_iwmmxt_muluhw_armeb +#define helper_iwmmxt_mululw helper_iwmmxt_mululw_armeb +#define helper_iwmmxt_packsl helper_iwmmxt_packsl_armeb +#define helper_iwmmxt_packsq helper_iwmmxt_packsq_armeb +#define helper_iwmmxt_packsw helper_iwmmxt_packsw_armeb +#define helper_iwmmxt_packul helper_iwmmxt_packul_armeb +#define helper_iwmmxt_packuq helper_iwmmxt_packuq_armeb +#define helper_iwmmxt_packuw helper_iwmmxt_packuw_armeb +#define helper_iwmmxt_rorl helper_iwmmxt_rorl_armeb +#define helper_iwmmxt_rorq helper_iwmmxt_rorq_armeb +#define helper_iwmmxt_rorw helper_iwmmxt_rorw_armeb +#define helper_iwmmxt_sadb helper_iwmmxt_sadb_armeb +#define helper_iwmmxt_sadw helper_iwmmxt_sadw_armeb +#define helper_iwmmxt_setpsr_nz helper_iwmmxt_setpsr_nz_armeb +#define helper_iwmmxt_shufh helper_iwmmxt_shufh_armeb +#define helper_iwmmxt_slll helper_iwmmxt_slll_armeb +#define helper_iwmmxt_sllq helper_iwmmxt_sllq_armeb +#define helper_iwmmxt_sllw helper_iwmmxt_sllw_armeb +#define helper_iwmmxt_sral helper_iwmmxt_sral_armeb +#define helper_iwmmxt_sraq helper_iwmmxt_sraq_armeb +#define helper_iwmmxt_sraw helper_iwmmxt_sraw_armeb +#define helper_iwmmxt_srll helper_iwmmxt_srll_armeb +#define helper_iwmmxt_srlq helper_iwmmxt_srlq_armeb +#define helper_iwmmxt_srlw helper_iwmmxt_srlw_armeb +#define helper_iwmmxt_subnb helper_iwmmxt_subnb_armeb +#define helper_iwmmxt_subnl helper_iwmmxt_subnl_armeb +#define helper_iwmmxt_subnw helper_iwmmxt_subnw_armeb +#define helper_iwmmxt_subsb helper_iwmmxt_subsb_armeb +#define helper_iwmmxt_subsl helper_iwmmxt_subsl_armeb +#define helper_iwmmxt_subsw helper_iwmmxt_subsw_armeb +#define helper_iwmmxt_subub helper_iwmmxt_subub_armeb +#define helper_iwmmxt_subul helper_iwmmxt_subul_armeb +#define helper_iwmmxt_subuw helper_iwmmxt_subuw_armeb +#define helper_iwmmxt_unpackhb helper_iwmmxt_unpackhb_armeb +#define helper_iwmmxt_unpackhl helper_iwmmxt_unpackhl_armeb +#define helper_iwmmxt_unpackhsb helper_iwmmxt_unpackhsb_armeb +#define helper_iwmmxt_unpackhsl helper_iwmmxt_unpackhsl_armeb +#define helper_iwmmxt_unpackhsw helper_iwmmxt_unpackhsw_armeb +#define helper_iwmmxt_unpackhub helper_iwmmxt_unpackhub_armeb +#define helper_iwmmxt_unpackhul helper_iwmmxt_unpackhul_armeb +#define helper_iwmmxt_unpackhuw helper_iwmmxt_unpackhuw_armeb +#define helper_iwmmxt_unpackhw helper_iwmmxt_unpackhw_armeb +#define helper_iwmmxt_unpacklb helper_iwmmxt_unpacklb_armeb +#define helper_iwmmxt_unpackll helper_iwmmxt_unpackll_armeb +#define helper_iwmmxt_unpacklsb helper_iwmmxt_unpacklsb_armeb +#define helper_iwmmxt_unpacklsl helper_iwmmxt_unpacklsl_armeb +#define helper_iwmmxt_unpacklsw helper_iwmmxt_unpacklsw_armeb +#define helper_iwmmxt_unpacklub helper_iwmmxt_unpacklub_armeb +#define helper_iwmmxt_unpacklul helper_iwmmxt_unpacklul_armeb +#define helper_iwmmxt_unpackluw helper_iwmmxt_unpackluw_armeb +#define helper_iwmmxt_unpacklw helper_iwmmxt_unpacklw_armeb +#define helper_ldb_cmmu helper_ldb_cmmu_armeb +#define helper_ldb_mmu helper_ldb_mmu_armeb +#define helper_ldl_cmmu helper_ldl_cmmu_armeb +#define helper_ldl_mmu helper_ldl_mmu_armeb +#define helper_ldq_cmmu helper_ldq_cmmu_armeb +#define helper_ldq_mmu helper_ldq_mmu_armeb +#define helper_ldw_cmmu helper_ldw_cmmu_armeb +#define helper_ldw_mmu helper_ldw_mmu_armeb +#define helper_le_ldl_cmmu helper_le_ldl_cmmu_armeb +#define helper_le_ldq_cmmu helper_le_ldq_cmmu_armeb +#define helper_le_ldq_mmu helper_le_ldq_mmu_armeb +#define helper_le_ldsl_mmu helper_le_ldsl_mmu_armeb +#define helper_le_ldsw_mmu helper_le_ldsw_mmu_armeb +#define helper_le_ldul_mmu helper_le_ldul_mmu_armeb +#define helper_le_lduw_mmu helper_le_lduw_mmu_armeb +#define helper_le_ldw_cmmu helper_le_ldw_cmmu_armeb +#define helper_le_stl_mmu helper_le_stl_mmu_armeb +#define helper_le_stq_mmu helper_le_stq_mmu_armeb +#define helper_le_stw_mmu helper_le_stw_mmu_armeb +#define helper_msr_i_pstate helper_msr_i_pstate_armeb +#define helper_neon_abd_f32 helper_neon_abd_f32_armeb +#define helper_neon_abdl_s16 helper_neon_abdl_s16_armeb +#define helper_neon_abdl_s32 helper_neon_abdl_s32_armeb +#define helper_neon_abdl_s64 helper_neon_abdl_s64_armeb +#define helper_neon_abdl_u16 helper_neon_abdl_u16_armeb +#define helper_neon_abdl_u32 helper_neon_abdl_u32_armeb +#define helper_neon_abdl_u64 helper_neon_abdl_u64_armeb +#define helper_neon_abd_s16 helper_neon_abd_s16_armeb +#define helper_neon_abd_s32 helper_neon_abd_s32_armeb +#define helper_neon_abd_s8 helper_neon_abd_s8_armeb +#define helper_neon_abd_u16 helper_neon_abd_u16_armeb +#define helper_neon_abd_u32 helper_neon_abd_u32_armeb +#define helper_neon_abd_u8 helper_neon_abd_u8_armeb +#define helper_neon_abs_s16 helper_neon_abs_s16_armeb +#define helper_neon_abs_s8 helper_neon_abs_s8_armeb +#define helper_neon_acge_f32 helper_neon_acge_f32_armeb +#define helper_neon_acge_f64 helper_neon_acge_f64_armeb +#define helper_neon_acgt_f32 helper_neon_acgt_f32_armeb +#define helper_neon_acgt_f64 helper_neon_acgt_f64_armeb +#define helper_neon_addl_saturate_s32 helper_neon_addl_saturate_s32_armeb +#define helper_neon_addl_saturate_s64 helper_neon_addl_saturate_s64_armeb +#define helper_neon_addl_u16 helper_neon_addl_u16_armeb +#define helper_neon_addl_u32 helper_neon_addl_u32_armeb +#define helper_neon_add_u16 helper_neon_add_u16_armeb +#define helper_neon_add_u8 helper_neon_add_u8_armeb +#define helper_neon_ceq_f32 helper_neon_ceq_f32_armeb +#define helper_neon_ceq_u16 helper_neon_ceq_u16_armeb +#define helper_neon_ceq_u32 helper_neon_ceq_u32_armeb +#define helper_neon_ceq_u8 helper_neon_ceq_u8_armeb +#define helper_neon_cge_f32 helper_neon_cge_f32_armeb +#define helper_neon_cge_s16 helper_neon_cge_s16_armeb +#define helper_neon_cge_s32 helper_neon_cge_s32_armeb +#define helper_neon_cge_s8 helper_neon_cge_s8_armeb +#define helper_neon_cge_u16 helper_neon_cge_u16_armeb +#define helper_neon_cge_u32 helper_neon_cge_u32_armeb +#define helper_neon_cge_u8 helper_neon_cge_u8_armeb +#define helper_neon_cgt_f32 helper_neon_cgt_f32_armeb +#define helper_neon_cgt_s16 helper_neon_cgt_s16_armeb +#define helper_neon_cgt_s32 helper_neon_cgt_s32_armeb +#define helper_neon_cgt_s8 helper_neon_cgt_s8_armeb +#define helper_neon_cgt_u16 helper_neon_cgt_u16_armeb +#define helper_neon_cgt_u32 helper_neon_cgt_u32_armeb +#define helper_neon_cgt_u8 helper_neon_cgt_u8_armeb +#define helper_neon_cls_s16 helper_neon_cls_s16_armeb +#define helper_neon_cls_s32 helper_neon_cls_s32_armeb +#define helper_neon_cls_s8 helper_neon_cls_s8_armeb +#define helper_neon_clz_u16 helper_neon_clz_u16_armeb +#define helper_neon_clz_u8 helper_neon_clz_u8_armeb +#define helper_neon_cnt_u8 helper_neon_cnt_u8_armeb +#define helper_neon_fcvt_f16_to_f32 helper_neon_fcvt_f16_to_f32_armeb +#define helper_neon_fcvt_f32_to_f16 helper_neon_fcvt_f32_to_f16_armeb +#define helper_neon_hadd_s16 helper_neon_hadd_s16_armeb +#define helper_neon_hadd_s32 helper_neon_hadd_s32_armeb +#define helper_neon_hadd_s8 helper_neon_hadd_s8_armeb +#define helper_neon_hadd_u16 helper_neon_hadd_u16_armeb +#define helper_neon_hadd_u32 helper_neon_hadd_u32_armeb +#define helper_neon_hadd_u8 helper_neon_hadd_u8_armeb +#define helper_neon_hsub_s16 helper_neon_hsub_s16_armeb +#define helper_neon_hsub_s32 helper_neon_hsub_s32_armeb +#define helper_neon_hsub_s8 helper_neon_hsub_s8_armeb +#define helper_neon_hsub_u16 helper_neon_hsub_u16_armeb +#define helper_neon_hsub_u32 helper_neon_hsub_u32_armeb +#define helper_neon_hsub_u8 helper_neon_hsub_u8_armeb +#define helper_neon_max_s16 helper_neon_max_s16_armeb +#define helper_neon_max_s32 helper_neon_max_s32_armeb +#define helper_neon_max_s8 helper_neon_max_s8_armeb +#define helper_neon_max_u16 helper_neon_max_u16_armeb +#define helper_neon_max_u32 helper_neon_max_u32_armeb +#define helper_neon_max_u8 helper_neon_max_u8_armeb +#define helper_neon_min_s16 helper_neon_min_s16_armeb +#define helper_neon_min_s32 helper_neon_min_s32_armeb +#define helper_neon_min_s8 helper_neon_min_s8_armeb +#define helper_neon_min_u16 helper_neon_min_u16_armeb +#define helper_neon_min_u32 helper_neon_min_u32_armeb +#define helper_neon_min_u8 helper_neon_min_u8_armeb +#define helper_neon_mull_p8 helper_neon_mull_p8_armeb +#define helper_neon_mull_s16 helper_neon_mull_s16_armeb +#define helper_neon_mull_s8 helper_neon_mull_s8_armeb +#define helper_neon_mull_u16 helper_neon_mull_u16_armeb +#define helper_neon_mull_u8 helper_neon_mull_u8_armeb +#define helper_neon_mul_p8 helper_neon_mul_p8_armeb +#define helper_neon_mul_u16 helper_neon_mul_u16_armeb +#define helper_neon_mul_u8 helper_neon_mul_u8_armeb +#define helper_neon_narrow_high_u16 helper_neon_narrow_high_u16_armeb +#define helper_neon_narrow_high_u8 helper_neon_narrow_high_u8_armeb +#define helper_neon_narrow_round_high_u16 helper_neon_narrow_round_high_u16_armeb +#define helper_neon_narrow_round_high_u8 helper_neon_narrow_round_high_u8_armeb +#define helper_neon_narrow_sat_s16 helper_neon_narrow_sat_s16_armeb +#define helper_neon_narrow_sat_s32 helper_neon_narrow_sat_s32_armeb +#define helper_neon_narrow_sat_s8 helper_neon_narrow_sat_s8_armeb +#define helper_neon_narrow_sat_u16 helper_neon_narrow_sat_u16_armeb +#define helper_neon_narrow_sat_u32 helper_neon_narrow_sat_u32_armeb +#define helper_neon_narrow_sat_u8 helper_neon_narrow_sat_u8_armeb +#define helper_neon_narrow_u16 helper_neon_narrow_u16_armeb +#define helper_neon_narrow_u8 helper_neon_narrow_u8_armeb +#define helper_neon_negl_u16 helper_neon_negl_u16_armeb +#define helper_neon_negl_u32 helper_neon_negl_u32_armeb +#define helper_neon_paddl_u16 helper_neon_paddl_u16_armeb +#define helper_neon_paddl_u32 helper_neon_paddl_u32_armeb +#define helper_neon_padd_u16 helper_neon_padd_u16_armeb +#define helper_neon_padd_u8 helper_neon_padd_u8_armeb +#define helper_neon_pmax_s16 helper_neon_pmax_s16_armeb +#define helper_neon_pmax_s8 helper_neon_pmax_s8_armeb +#define helper_neon_pmax_u16 helper_neon_pmax_u16_armeb +#define helper_neon_pmax_u8 helper_neon_pmax_u8_armeb +#define helper_neon_pmin_s16 helper_neon_pmin_s16_armeb +#define helper_neon_pmin_s8 helper_neon_pmin_s8_armeb +#define helper_neon_pmin_u16 helper_neon_pmin_u16_armeb +#define helper_neon_pmin_u8 helper_neon_pmin_u8_armeb +#define helper_neon_pmull_64_hi helper_neon_pmull_64_hi_armeb +#define helper_neon_pmull_64_lo helper_neon_pmull_64_lo_armeb +#define helper_neon_qabs_s16 helper_neon_qabs_s16_armeb +#define helper_neon_qabs_s32 helper_neon_qabs_s32_armeb +#define helper_neon_qabs_s64 helper_neon_qabs_s64_armeb +#define helper_neon_qabs_s8 helper_neon_qabs_s8_armeb +#define helper_neon_qadd_s16 helper_neon_qadd_s16_armeb +#define helper_neon_qadd_s32 helper_neon_qadd_s32_armeb +#define helper_neon_qadd_s64 helper_neon_qadd_s64_armeb +#define helper_neon_qadd_s8 helper_neon_qadd_s8_armeb +#define helper_neon_qadd_u16 helper_neon_qadd_u16_armeb +#define helper_neon_qadd_u32 helper_neon_qadd_u32_armeb +#define helper_neon_qadd_u64 helper_neon_qadd_u64_armeb +#define helper_neon_qadd_u8 helper_neon_qadd_u8_armeb +#define helper_neon_qdmulh_s16 helper_neon_qdmulh_s16_armeb +#define helper_neon_qdmulh_s32 helper_neon_qdmulh_s32_armeb +#define helper_neon_qneg_s16 helper_neon_qneg_s16_armeb +#define helper_neon_qneg_s32 helper_neon_qneg_s32_armeb +#define helper_neon_qneg_s64 helper_neon_qneg_s64_armeb +#define helper_neon_qneg_s8 helper_neon_qneg_s8_armeb +#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_armeb +#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_armeb +#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_armeb +#define helper_neon_qrshl_s32 helper_neon_qrshl_s32_armeb +#define helper_neon_qrshl_s64 helper_neon_qrshl_s64_armeb +#define helper_neon_qrshl_s8 helper_neon_qrshl_s8_armeb +#define helper_neon_qrshl_u16 helper_neon_qrshl_u16_armeb +#define helper_neon_qrshl_u32 helper_neon_qrshl_u32_armeb +#define helper_neon_qrshl_u64 helper_neon_qrshl_u64_armeb +#define helper_neon_qrshl_u8 helper_neon_qrshl_u8_armeb +#define helper_neon_qshl_s16 helper_neon_qshl_s16_armeb +#define helper_neon_qshl_s32 helper_neon_qshl_s32_armeb +#define helper_neon_qshl_s64 helper_neon_qshl_s64_armeb +#define helper_neon_qshl_s8 helper_neon_qshl_s8_armeb +#define helper_neon_qshl_u16 helper_neon_qshl_u16_armeb +#define helper_neon_qshl_u32 helper_neon_qshl_u32_armeb +#define helper_neon_qshl_u64 helper_neon_qshl_u64_armeb +#define helper_neon_qshl_u8 helper_neon_qshl_u8_armeb +#define helper_neon_qshlu_s16 helper_neon_qshlu_s16_armeb +#define helper_neon_qshlu_s32 helper_neon_qshlu_s32_armeb +#define helper_neon_qshlu_s64 helper_neon_qshlu_s64_armeb +#define helper_neon_qshlu_s8 helper_neon_qshlu_s8_armeb +#define helper_neon_qsub_s16 helper_neon_qsub_s16_armeb +#define helper_neon_qsub_s32 helper_neon_qsub_s32_armeb +#define helper_neon_qsub_s64 helper_neon_qsub_s64_armeb +#define helper_neon_qsub_s8 helper_neon_qsub_s8_armeb +#define helper_neon_qsub_u16 helper_neon_qsub_u16_armeb +#define helper_neon_qsub_u32 helper_neon_qsub_u32_armeb +#define helper_neon_qsub_u64 helper_neon_qsub_u64_armeb +#define helper_neon_qsub_u8 helper_neon_qsub_u8_armeb +#define helper_neon_qunzip16 helper_neon_qunzip16_armeb +#define helper_neon_qunzip32 helper_neon_qunzip32_armeb +#define helper_neon_qunzip8 helper_neon_qunzip8_armeb +#define helper_neon_qzip16 helper_neon_qzip16_armeb +#define helper_neon_qzip32 helper_neon_qzip32_armeb +#define helper_neon_qzip8 helper_neon_qzip8_armeb +#define helper_neon_rbit_u8 helper_neon_rbit_u8_armeb +#define helper_neon_rhadd_s16 helper_neon_rhadd_s16_armeb +#define helper_neon_rhadd_s32 helper_neon_rhadd_s32_armeb +#define helper_neon_rhadd_s8 helper_neon_rhadd_s8_armeb +#define helper_neon_rhadd_u16 helper_neon_rhadd_u16_armeb +#define helper_neon_rhadd_u32 helper_neon_rhadd_u32_armeb +#define helper_neon_rhadd_u8 helper_neon_rhadd_u8_armeb +#define helper_neon_rshl_s16 helper_neon_rshl_s16_armeb +#define helper_neon_rshl_s32 helper_neon_rshl_s32_armeb +#define helper_neon_rshl_s64 helper_neon_rshl_s64_armeb +#define helper_neon_rshl_s8 helper_neon_rshl_s8_armeb +#define helper_neon_rshl_u16 helper_neon_rshl_u16_armeb +#define helper_neon_rshl_u32 helper_neon_rshl_u32_armeb +#define helper_neon_rshl_u64 helper_neon_rshl_u64_armeb +#define helper_neon_rshl_u8 helper_neon_rshl_u8_armeb +#define helper_neon_shl_s16 helper_neon_shl_s16_armeb +#define helper_neon_shl_s32 helper_neon_shl_s32_armeb +#define helper_neon_shl_s64 helper_neon_shl_s64_armeb +#define helper_neon_shl_s8 helper_neon_shl_s8_armeb +#define helper_neon_shl_u16 helper_neon_shl_u16_armeb +#define helper_neon_shl_u32 helper_neon_shl_u32_armeb +#define helper_neon_shl_u64 helper_neon_shl_u64_armeb +#define helper_neon_shl_u8 helper_neon_shl_u8_armeb +#define helper_neon_sqadd_u16 helper_neon_sqadd_u16_armeb +#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_armeb +#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_armeb +#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_armeb +#define helper_neon_subl_u16 helper_neon_subl_u16_armeb +#define helper_neon_subl_u32 helper_neon_subl_u32_armeb +#define helper_neon_sub_u16 helper_neon_sub_u16_armeb +#define helper_neon_sub_u8 helper_neon_sub_u8_armeb +#define helper_neon_tbl helper_neon_tbl_armeb +#define helper_neon_tst_u16 helper_neon_tst_u16_armeb +#define helper_neon_tst_u32 helper_neon_tst_u32_armeb +#define helper_neon_tst_u8 helper_neon_tst_u8_armeb +#define helper_neon_unarrow_sat16 helper_neon_unarrow_sat16_armeb +#define helper_neon_unarrow_sat32 helper_neon_unarrow_sat32_armeb +#define helper_neon_unarrow_sat8 helper_neon_unarrow_sat8_armeb +#define helper_neon_unzip16 helper_neon_unzip16_armeb +#define helper_neon_unzip8 helper_neon_unzip8_armeb +#define helper_neon_uqadd_s16 helper_neon_uqadd_s16_armeb +#define helper_neon_uqadd_s32 helper_neon_uqadd_s32_armeb +#define helper_neon_uqadd_s64 helper_neon_uqadd_s64_armeb +#define helper_neon_uqadd_s8 helper_neon_uqadd_s8_armeb +#define helper_neon_widen_s16 helper_neon_widen_s16_armeb +#define helper_neon_widen_s8 helper_neon_widen_s8_armeb +#define helper_neon_widen_u16 helper_neon_widen_u16_armeb +#define helper_neon_widen_u8 helper_neon_widen_u8_armeb +#define helper_neon_zip16 helper_neon_zip16_armeb +#define helper_neon_zip8 helper_neon_zip8_armeb +#define helper_pre_hvc helper_pre_hvc_armeb +#define helper_pre_smc helper_pre_smc_armeb +#define helper_qadd16 helper_qadd16_armeb +#define helper_qadd8 helper_qadd8_armeb +#define helper_qaddsubx helper_qaddsubx_armeb +#define helper_qsub16 helper_qsub16_armeb +#define helper_qsub8 helper_qsub8_armeb +#define helper_qsubaddx helper_qsubaddx_armeb +#define helper_rbit helper_rbit_armeb +#define helper_recpe_f32 helper_recpe_f32_armeb +#define helper_recpe_f64 helper_recpe_f64_armeb +#define helper_recpe_u32 helper_recpe_u32_armeb +#define helper_recps_f32 helper_recps_f32_armeb +#define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_armeb +#define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_armeb +#define helper_ret_ldub_mmu helper_ret_ldub_mmu_armeb +#define helper_ret_stb_mmu helper_ret_stb_mmu_armeb +#define helper_rintd helper_rintd_armeb +#define helper_rintd_exact helper_rintd_exact_armeb +#define helper_rints helper_rints_armeb +#define helper_rints_exact helper_rints_exact_armeb +#define helper_ror_cc helper_ror_cc_armeb +#define helper_rsqrte_f32 helper_rsqrte_f32_armeb +#define helper_rsqrte_f64 helper_rsqrte_f64_armeb +#define helper_rsqrte_u32 helper_rsqrte_u32_armeb +#define helper_rsqrts_f32 helper_rsqrts_f32_armeb +#define helper_sadd16 helper_sadd16_armeb +#define helper_sadd8 helper_sadd8_armeb +#define helper_saddsubx helper_saddsubx_armeb +#define helper_sar_cc helper_sar_cc_armeb +#define helper_sdiv helper_sdiv_armeb +#define helper_sel_flags helper_sel_flags_armeb +#define helper_set_cp_reg helper_set_cp_reg_armeb +#define helper_set_cp_reg64 helper_set_cp_reg64_armeb +#define helper_set_neon_rmode helper_set_neon_rmode_armeb +#define helper_set_r13_banked helper_set_r13_banked_armeb +#define helper_set_rmode helper_set_rmode_armeb +#define helper_set_user_reg helper_set_user_reg_armeb +#define helper_shadd16 helper_shadd16_armeb +#define helper_shadd8 helper_shadd8_armeb +#define helper_shaddsubx helper_shaddsubx_armeb +#define helper_shl_cc helper_shl_cc_armeb +#define helper_shr_cc helper_shr_cc_armeb +#define helper_shsub16 helper_shsub16_armeb +#define helper_shsub8 helper_shsub8_armeb +#define helper_shsubaddx helper_shsubaddx_armeb +#define helper_ssat helper_ssat_armeb +#define helper_ssat16 helper_ssat16_armeb +#define helper_ssub16 helper_ssub16_armeb +#define helper_ssub8 helper_ssub8_armeb +#define helper_ssubaddx helper_ssubaddx_armeb +#define helper_stb_mmu helper_stb_mmu_armeb +#define helper_stl_mmu helper_stl_mmu_armeb +#define helper_stq_mmu helper_stq_mmu_armeb +#define helper_stw_mmu helper_stw_mmu_armeb +#define helper_sub_saturate helper_sub_saturate_armeb +#define helper_sub_usaturate helper_sub_usaturate_armeb +#define helper_sxtb16 helper_sxtb16_armeb +#define helper_uadd16 helper_uadd16_armeb +#define helper_uadd8 helper_uadd8_armeb +#define helper_uaddsubx helper_uaddsubx_armeb +#define helper_udiv helper_udiv_armeb +#define helper_uhadd16 helper_uhadd16_armeb +#define helper_uhadd8 helper_uhadd8_armeb +#define helper_uhaddsubx helper_uhaddsubx_armeb +#define helper_uhsub16 helper_uhsub16_armeb +#define helper_uhsub8 helper_uhsub8_armeb +#define helper_uhsubaddx helper_uhsubaddx_armeb +#define helper_uqadd16 helper_uqadd16_armeb +#define helper_uqadd8 helper_uqadd8_armeb +#define helper_uqaddsubx helper_uqaddsubx_armeb +#define helper_uqsub16 helper_uqsub16_armeb +#define helper_uqsub8 helper_uqsub8_armeb +#define helper_uqsubaddx helper_uqsubaddx_armeb +#define helper_usad8 helper_usad8_armeb +#define helper_usat helper_usat_armeb +#define helper_usat16 helper_usat16_armeb +#define helper_usub16 helper_usub16_armeb +#define helper_usub8 helper_usub8_armeb +#define helper_usubaddx helper_usubaddx_armeb +#define helper_uxtb16 helper_uxtb16_armeb +#define helper_v7m_mrs helper_v7m_mrs_armeb +#define helper_v7m_msr helper_v7m_msr_armeb +#define helper_vfp_absd helper_vfp_absd_armeb +#define helper_vfp_abss helper_vfp_abss_armeb +#define helper_vfp_addd helper_vfp_addd_armeb +#define helper_vfp_adds helper_vfp_adds_armeb +#define helper_vfp_cmpd helper_vfp_cmpd_armeb +#define helper_vfp_cmped helper_vfp_cmped_armeb +#define helper_vfp_cmpes helper_vfp_cmpes_armeb +#define helper_vfp_cmps helper_vfp_cmps_armeb +#define helper_vfp_divd helper_vfp_divd_armeb +#define helper_vfp_divs helper_vfp_divs_armeb +#define helper_vfp_fcvtds helper_vfp_fcvtds_armeb +#define helper_vfp_fcvt_f16_to_f32 helper_vfp_fcvt_f16_to_f32_armeb +#define helper_vfp_fcvt_f16_to_f64 helper_vfp_fcvt_f16_to_f64_armeb +#define helper_vfp_fcvt_f32_to_f16 helper_vfp_fcvt_f32_to_f16_armeb +#define helper_vfp_fcvt_f64_to_f16 helper_vfp_fcvt_f64_to_f16_armeb +#define helper_vfp_fcvtsd helper_vfp_fcvtsd_armeb +#define helper_vfp_get_fpscr helper_vfp_get_fpscr_armeb +#define helper_vfp_maxd helper_vfp_maxd_armeb +#define helper_vfp_maxnumd helper_vfp_maxnumd_armeb +#define helper_vfp_maxnums helper_vfp_maxnums_armeb +#define helper_vfp_maxs helper_vfp_maxs_armeb +#define helper_vfp_mind helper_vfp_mind_armeb +#define helper_vfp_minnumd helper_vfp_minnumd_armeb +#define helper_vfp_minnums helper_vfp_minnums_armeb +#define helper_vfp_mins helper_vfp_mins_armeb +#define helper_vfp_muladdd helper_vfp_muladdd_armeb +#define helper_vfp_muladds helper_vfp_muladds_armeb +#define helper_vfp_muld helper_vfp_muld_armeb +#define helper_vfp_muls helper_vfp_muls_armeb +#define helper_vfp_negd helper_vfp_negd_armeb +#define helper_vfp_negs helper_vfp_negs_armeb +#define helper_vfp_set_fpscr helper_vfp_set_fpscr_armeb +#define helper_vfp_shtod helper_vfp_shtod_armeb +#define helper_vfp_shtos helper_vfp_shtos_armeb +#define helper_vfp_sitod helper_vfp_sitod_armeb +#define helper_vfp_sitos helper_vfp_sitos_armeb +#define helper_vfp_sltod helper_vfp_sltod_armeb +#define helper_vfp_sltos helper_vfp_sltos_armeb +#define helper_vfp_sqrtd helper_vfp_sqrtd_armeb +#define helper_vfp_sqrts helper_vfp_sqrts_armeb +#define helper_vfp_sqtod helper_vfp_sqtod_armeb +#define helper_vfp_sqtos helper_vfp_sqtos_armeb +#define helper_vfp_subd helper_vfp_subd_armeb +#define helper_vfp_subs helper_vfp_subs_armeb +#define helper_vfp_toshd helper_vfp_toshd_armeb +#define helper_vfp_toshd_round_to_zero helper_vfp_toshd_round_to_zero_armeb +#define helper_vfp_toshs helper_vfp_toshs_armeb +#define helper_vfp_toshs_round_to_zero helper_vfp_toshs_round_to_zero_armeb +#define helper_vfp_tosid helper_vfp_tosid_armeb +#define helper_vfp_tosis helper_vfp_tosis_armeb +#define helper_vfp_tosizd helper_vfp_tosizd_armeb +#define helper_vfp_tosizs helper_vfp_tosizs_armeb +#define helper_vfp_tosld helper_vfp_tosld_armeb +#define helper_vfp_tosld_round_to_zero helper_vfp_tosld_round_to_zero_armeb +#define helper_vfp_tosls helper_vfp_tosls_armeb +#define helper_vfp_tosls_round_to_zero helper_vfp_tosls_round_to_zero_armeb +#define helper_vfp_tosqd helper_vfp_tosqd_armeb +#define helper_vfp_tosqs helper_vfp_tosqs_armeb +#define helper_vfp_touhd helper_vfp_touhd_armeb +#define helper_vfp_touhd_round_to_zero helper_vfp_touhd_round_to_zero_armeb +#define helper_vfp_touhs helper_vfp_touhs_armeb +#define helper_vfp_touhs_round_to_zero helper_vfp_touhs_round_to_zero_armeb +#define helper_vfp_touid helper_vfp_touid_armeb +#define helper_vfp_touis helper_vfp_touis_armeb +#define helper_vfp_touizd helper_vfp_touizd_armeb +#define helper_vfp_touizs helper_vfp_touizs_armeb +#define helper_vfp_tould helper_vfp_tould_armeb +#define helper_vfp_tould_round_to_zero helper_vfp_tould_round_to_zero_armeb +#define helper_vfp_touls helper_vfp_touls_armeb +#define helper_vfp_touls_round_to_zero helper_vfp_touls_round_to_zero_armeb +#define helper_vfp_touqd helper_vfp_touqd_armeb +#define helper_vfp_touqs helper_vfp_touqs_armeb +#define helper_vfp_uhtod helper_vfp_uhtod_armeb +#define helper_vfp_uhtos helper_vfp_uhtos_armeb +#define helper_vfp_uitod helper_vfp_uitod_armeb +#define helper_vfp_uitos helper_vfp_uitos_armeb +#define helper_vfp_ultod helper_vfp_ultod_armeb +#define helper_vfp_ultos helper_vfp_ultos_armeb +#define helper_vfp_uqtod helper_vfp_uqtod_armeb +#define helper_vfp_uqtos helper_vfp_uqtos_armeb +#define helper_wfe helper_wfe_armeb +#define helper_wfi helper_wfi_armeb +#define hex2decimal hex2decimal_armeb +#define hw_breakpoint_update hw_breakpoint_update_armeb +#define hw_breakpoint_update_all hw_breakpoint_update_all_armeb +#define hw_watchpoint_update hw_watchpoint_update_armeb +#define hw_watchpoint_update_all hw_watchpoint_update_all_armeb +#define _init _init_armeb +#define init_cpreg_list init_cpreg_list_armeb +#define init_lists init_lists_armeb +#define input_type_enum input_type_enum_armeb +#define int128_2_64 int128_2_64_armeb +#define int128_add int128_add_armeb +#define int128_addto int128_addto_armeb +#define int128_and int128_and_armeb +#define int128_eq int128_eq_armeb +#define int128_ge int128_ge_armeb +#define int128_get64 int128_get64_armeb +#define int128_gt int128_gt_armeb +#define int128_le int128_le_armeb +#define int128_lt int128_lt_armeb +#define int128_make64 int128_make64_armeb +#define int128_max int128_max_armeb +#define int128_min int128_min_armeb +#define int128_ne int128_ne_armeb +#define int128_neg int128_neg_armeb +#define int128_nz int128_nz_armeb +#define int128_rshift int128_rshift_armeb +#define int128_sub int128_sub_armeb +#define int128_subfrom int128_subfrom_armeb +#define int128_zero int128_zero_armeb +#define int16_to_float32 int16_to_float32_armeb +#define int16_to_float64 int16_to_float64_armeb +#define int32_to_float128 int32_to_float128_armeb +#define int32_to_float32 int32_to_float32_armeb +#define int32_to_float64 int32_to_float64_armeb +#define int32_to_floatx80 int32_to_floatx80_armeb +#define int64_to_float128 int64_to_float128_armeb +#define int64_to_float32 int64_to_float32_armeb +#define int64_to_float64 int64_to_float64_armeb +#define int64_to_floatx80 int64_to_floatx80_armeb +#define invalidate_and_set_dirty invalidate_and_set_dirty_armeb +#define invalidate_page_bitmap invalidate_page_bitmap_armeb +#define io_mem_read io_mem_read_armeb +#define io_mem_write io_mem_write_armeb +#define io_readb io_readb_armeb +#define io_readl io_readl_armeb +#define io_readq io_readq_armeb +#define io_readw io_readw_armeb +#define iotlb_to_region iotlb_to_region_armeb +#define io_writeb io_writeb_armeb +#define io_writel io_writel_armeb +#define io_writeq io_writeq_armeb +#define io_writew io_writew_armeb +#define is_a64 is_a64_armeb +#define is_help_option is_help_option_armeb +#define isr_read isr_read_armeb +#define is_valid_option_list is_valid_option_list_armeb +#define iwmmxt_load_creg iwmmxt_load_creg_armeb +#define iwmmxt_load_reg iwmmxt_load_reg_armeb +#define iwmmxt_store_creg iwmmxt_store_creg_armeb +#define iwmmxt_store_reg iwmmxt_store_reg_armeb +#define __jit_debug_descriptor __jit_debug_descriptor_armeb +#define __jit_debug_register_code __jit_debug_register_code_armeb +#define kvm_to_cpreg_id kvm_to_cpreg_id_armeb +#define last_ram_offset last_ram_offset_armeb +#define ldl_be_p ldl_be_p_armeb +#define ldl_be_phys ldl_be_phys_armeb +#define ldl_he_p ldl_he_p_armeb +#define ldl_le_p ldl_le_p_armeb +#define ldl_le_phys ldl_le_phys_armeb +#define ldl_phys ldl_phys_armeb +#define ldl_phys_internal ldl_phys_internal_armeb +#define ldq_be_p ldq_be_p_armeb +#define ldq_be_phys ldq_be_phys_armeb +#define ldq_he_p ldq_he_p_armeb +#define ldq_le_p ldq_le_p_armeb +#define ldq_le_phys ldq_le_phys_armeb +#define ldq_phys ldq_phys_armeb +#define ldq_phys_internal ldq_phys_internal_armeb +#define ldst_name ldst_name_armeb +#define ldub_p ldub_p_armeb +#define ldub_phys ldub_phys_armeb +#define lduw_be_p lduw_be_p_armeb +#define lduw_be_phys lduw_be_phys_armeb +#define lduw_he_p lduw_he_p_armeb +#define lduw_le_p lduw_le_p_armeb +#define lduw_le_phys lduw_le_phys_armeb +#define lduw_phys lduw_phys_armeb +#define lduw_phys_internal lduw_phys_internal_armeb +#define le128 le128_armeb +#define linked_bp_matches linked_bp_matches_armeb +#define listener_add_address_space listener_add_address_space_armeb +#define load_cpu_offset load_cpu_offset_armeb +#define load_reg load_reg_armeb +#define load_reg_var load_reg_var_armeb +#define log_cpu_state log_cpu_state_armeb +#define lpae_cp_reginfo lpae_cp_reginfo_armeb +#define lt128 lt128_armeb +#define machine_class_init machine_class_init_armeb +#define machine_finalize machine_finalize_armeb +#define machine_info machine_info_armeb +#define machine_initfn machine_initfn_armeb +#define machine_register_types machine_register_types_armeb +#define machvirt_init machvirt_init_armeb +#define machvirt_machine_init machvirt_machine_init_armeb +#define maj maj_armeb +#define mapping_conflict mapping_conflict_armeb +#define mapping_contiguous mapping_contiguous_armeb +#define mapping_have_same_region mapping_have_same_region_armeb +#define mapping_merge mapping_merge_armeb +#define mem_add mem_add_armeb +#define mem_begin mem_begin_armeb +#define mem_commit mem_commit_armeb +#define memory_access_is_direct memory_access_is_direct_armeb +#define memory_access_size memory_access_size_armeb +#define memory_init memory_init_armeb +#define memory_listener_match memory_listener_match_armeb +#define memory_listener_register memory_listener_register_armeb +#define memory_listener_unregister memory_listener_unregister_armeb +#define memory_map_init memory_map_init_armeb +#define memory_mapping_filter memory_mapping_filter_armeb +#define memory_mapping_list_add_mapping_sorted memory_mapping_list_add_mapping_sorted_armeb +#define memory_mapping_list_add_merge_sorted memory_mapping_list_add_merge_sorted_armeb +#define memory_mapping_list_free memory_mapping_list_free_armeb +#define memory_mapping_list_init memory_mapping_list_init_armeb +#define memory_region_access_valid memory_region_access_valid_armeb +#define memory_region_add_subregion memory_region_add_subregion_armeb +#define memory_region_add_subregion_common memory_region_add_subregion_common_armeb +#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_armeb +#define memory_region_big_endian memory_region_big_endian_armeb +#define memory_region_clear_pending memory_region_clear_pending_armeb +#define memory_region_del_subregion memory_region_del_subregion_armeb +#define memory_region_destructor_alias memory_region_destructor_alias_armeb +#define memory_region_destructor_none memory_region_destructor_none_armeb +#define memory_region_destructor_ram memory_region_destructor_ram_armeb +#define memory_region_destructor_ram_from_ptr memory_region_destructor_ram_from_ptr_armeb +#define memory_region_dispatch_read memory_region_dispatch_read_armeb +#define memory_region_dispatch_read1 memory_region_dispatch_read1_armeb +#define memory_region_dispatch_write memory_region_dispatch_write_armeb +#define memory_region_escape_name memory_region_escape_name_armeb +#define memory_region_finalize memory_region_finalize_armeb +#define memory_region_find memory_region_find_armeb +#define memory_region_get_addr memory_region_get_addr_armeb +#define memory_region_get_alignment memory_region_get_alignment_armeb +#define memory_region_get_container memory_region_get_container_armeb +#define memory_region_get_fd memory_region_get_fd_armeb +#define memory_region_get_may_overlap memory_region_get_may_overlap_armeb +#define memory_region_get_priority memory_region_get_priority_armeb +#define memory_region_get_ram_addr memory_region_get_ram_addr_armeb +#define memory_region_get_ram_ptr memory_region_get_ram_ptr_armeb +#define memory_region_get_size memory_region_get_size_armeb +#define memory_region_info memory_region_info_armeb +#define memory_region_init memory_region_init_armeb +#define memory_region_init_alias memory_region_init_alias_armeb +#define memory_region_initfn memory_region_initfn_armeb +#define memory_region_init_io memory_region_init_io_armeb +#define memory_region_init_ram memory_region_init_ram_armeb +#define memory_region_init_ram_ptr memory_region_init_ram_ptr_armeb +#define memory_region_init_reservation memory_region_init_reservation_armeb +#define memory_region_is_iommu memory_region_is_iommu_armeb +#define memory_region_is_logging memory_region_is_logging_armeb +#define memory_region_is_mapped memory_region_is_mapped_armeb +#define memory_region_is_ram memory_region_is_ram_armeb +#define memory_region_is_rom memory_region_is_rom_armeb +#define memory_region_is_romd memory_region_is_romd_armeb +#define memory_region_is_skip_dump memory_region_is_skip_dump_armeb +#define memory_region_is_unassigned memory_region_is_unassigned_armeb +#define memory_region_name memory_region_name_armeb +#define memory_region_need_escape memory_region_need_escape_armeb +#define memory_region_oldmmio_read_accessor memory_region_oldmmio_read_accessor_armeb +#define memory_region_oldmmio_write_accessor memory_region_oldmmio_write_accessor_armeb +#define memory_region_present memory_region_present_armeb +#define memory_region_read_accessor memory_region_read_accessor_armeb +#define memory_region_readd_subregion memory_region_readd_subregion_armeb +#define memory_region_ref memory_region_ref_armeb +#define memory_region_resolve_container memory_region_resolve_container_armeb +#define memory_region_rom_device_set_romd memory_region_rom_device_set_romd_armeb +#define memory_region_section_get_iotlb memory_region_section_get_iotlb_armeb +#define memory_region_set_address memory_region_set_address_armeb +#define memory_region_set_alias_offset memory_region_set_alias_offset_armeb +#define memory_region_set_enabled memory_region_set_enabled_armeb +#define memory_region_set_readonly memory_region_set_readonly_armeb +#define memory_region_set_skip_dump memory_region_set_skip_dump_armeb +#define memory_region_size memory_region_size_armeb +#define memory_region_to_address_space memory_region_to_address_space_armeb +#define memory_region_transaction_begin memory_region_transaction_begin_armeb +#define memory_region_transaction_commit memory_region_transaction_commit_armeb +#define memory_region_unref memory_region_unref_armeb +#define memory_region_update_container_subregions memory_region_update_container_subregions_armeb +#define memory_region_write_accessor memory_region_write_accessor_armeb +#define memory_region_wrong_endianness memory_region_wrong_endianness_armeb +#define memory_try_enable_merging memory_try_enable_merging_armeb +#define module_call_init module_call_init_armeb +#define module_load module_load_armeb +#define mpidr_cp_reginfo mpidr_cp_reginfo_armeb +#define mpidr_read mpidr_read_armeb +#define msr_mask msr_mask_armeb +#define mul128By64To192 mul128By64To192_armeb +#define mul128To256 mul128To256_armeb +#define mul64To128 mul64To128_armeb +#define muldiv64 muldiv64_armeb +#define neon_2rm_is_float_op neon_2rm_is_float_op_armeb +#define neon_2rm_sizes neon_2rm_sizes_armeb +#define neon_3r_sizes neon_3r_sizes_armeb +#define neon_get_scalar neon_get_scalar_armeb +#define neon_load_reg neon_load_reg_armeb +#define neon_load_reg64 neon_load_reg64_armeb +#define neon_load_scratch neon_load_scratch_armeb +#define neon_ls_element_type neon_ls_element_type_armeb +#define neon_reg_offset neon_reg_offset_armeb +#define neon_store_reg neon_store_reg_armeb +#define neon_store_reg64 neon_store_reg64_armeb +#define neon_store_scratch neon_store_scratch_armeb +#define new_ldst_label new_ldst_label_armeb +#define next_list next_list_armeb +#define normalizeFloat128Subnormal normalizeFloat128Subnormal_armeb +#define normalizeFloat16Subnormal normalizeFloat16Subnormal_armeb +#define normalizeFloat32Subnormal normalizeFloat32Subnormal_armeb +#define normalizeFloat64Subnormal normalizeFloat64Subnormal_armeb +#define normalizeFloatx80Subnormal normalizeFloatx80Subnormal_armeb +#define normalizeRoundAndPackFloat128 normalizeRoundAndPackFloat128_armeb +#define normalizeRoundAndPackFloat32 normalizeRoundAndPackFloat32_armeb +#define normalizeRoundAndPackFloat64 normalizeRoundAndPackFloat64_armeb +#define normalizeRoundAndPackFloatx80 normalizeRoundAndPackFloatx80_armeb +#define not_v6_cp_reginfo not_v6_cp_reginfo_armeb +#define not_v7_cp_reginfo not_v7_cp_reginfo_armeb +#define not_v8_cp_reginfo not_v8_cp_reginfo_armeb +#define object_child_foreach object_child_foreach_armeb +#define object_class_foreach object_class_foreach_armeb +#define object_class_foreach_tramp object_class_foreach_tramp_armeb +#define object_class_get_list object_class_get_list_armeb +#define object_class_get_list_tramp object_class_get_list_tramp_armeb +#define object_class_get_parent object_class_get_parent_armeb +#define object_deinit object_deinit_armeb +#define object_dynamic_cast object_dynamic_cast_armeb +#define object_finalize object_finalize_armeb +#define object_finalize_child_property object_finalize_child_property_armeb +#define object_get_child_property object_get_child_property_armeb +#define object_get_link_property object_get_link_property_armeb +#define object_get_root object_get_root_armeb +#define object_initialize_with_type object_initialize_with_type_armeb +#define object_init_with_type object_init_with_type_armeb +#define object_instance_init object_instance_init_armeb +#define object_new_with_type object_new_with_type_armeb +#define object_post_init_with_type object_post_init_with_type_armeb +#define object_property_add_alias object_property_add_alias_armeb +#define object_property_add_link object_property_add_link_armeb +#define object_property_add_uint16_ptr object_property_add_uint16_ptr_armeb +#define object_property_add_uint32_ptr object_property_add_uint32_ptr_armeb +#define object_property_add_uint64_ptr object_property_add_uint64_ptr_armeb +#define object_property_add_uint8_ptr object_property_add_uint8_ptr_armeb +#define object_property_allow_set_link object_property_allow_set_link_armeb +#define object_property_del object_property_del_armeb +#define object_property_del_all object_property_del_all_armeb +#define object_property_find object_property_find_armeb +#define object_property_get object_property_get_armeb +#define object_property_get_bool object_property_get_bool_armeb +#define object_property_get_int object_property_get_int_armeb +#define object_property_get_link object_property_get_link_armeb +#define object_property_get_qobject object_property_get_qobject_armeb +#define object_property_get_str object_property_get_str_armeb +#define object_property_get_type object_property_get_type_armeb +#define object_property_is_child object_property_is_child_armeb +#define object_property_set object_property_set_armeb +#define object_property_set_description object_property_set_description_armeb +#define object_property_set_link object_property_set_link_armeb +#define object_property_set_qobject object_property_set_qobject_armeb +#define object_release_link_property object_release_link_property_armeb +#define object_resolve_abs_path object_resolve_abs_path_armeb +#define object_resolve_child_property object_resolve_child_property_armeb +#define object_resolve_link object_resolve_link_armeb +#define object_resolve_link_property object_resolve_link_property_armeb +#define object_resolve_partial_path object_resolve_partial_path_armeb +#define object_resolve_path object_resolve_path_armeb +#define object_resolve_path_component object_resolve_path_component_armeb +#define object_resolve_path_type object_resolve_path_type_armeb +#define object_set_link_property object_set_link_property_armeb +#define object_unparent object_unparent_armeb +#define omap_cachemaint_write omap_cachemaint_write_armeb +#define omap_cp_reginfo omap_cp_reginfo_armeb +#define omap_threadid_write omap_threadid_write_armeb +#define omap_ticonfig_write omap_ticonfig_write_armeb +#define omap_wfi_write omap_wfi_write_armeb +#define op_bits op_bits_armeb +#define open_modeflags open_modeflags_armeb +#define op_to_mov op_to_mov_armeb +#define op_to_movi op_to_movi_armeb +#define output_type_enum output_type_enum_armeb +#define packFloat128 packFloat128_armeb +#define packFloat16 packFloat16_armeb +#define packFloat32 packFloat32_armeb +#define packFloat64 packFloat64_armeb +#define packFloatx80 packFloatx80_armeb +#define page_find page_find_armeb +#define page_find_alloc page_find_alloc_armeb +#define page_flush_tb page_flush_tb_armeb +#define page_flush_tb_1 page_flush_tb_1_armeb +#define page_init page_init_armeb +#define page_size_init page_size_init_armeb +#define par par_armeb +#define parse_array parse_array_armeb +#define parse_error parse_error_armeb +#define parse_escape parse_escape_armeb +#define parse_keyword parse_keyword_armeb +#define parse_literal parse_literal_armeb +#define parse_object parse_object_armeb +#define parse_optional parse_optional_armeb +#define parse_option_bool parse_option_bool_armeb +#define parse_option_number parse_option_number_armeb +#define parse_option_size parse_option_size_armeb +#define parse_pair parse_pair_armeb +#define parser_context_free parser_context_free_armeb +#define parser_context_new parser_context_new_armeb +#define parser_context_peek_token parser_context_peek_token_armeb +#define parser_context_pop_token parser_context_pop_token_armeb +#define parser_context_restore parser_context_restore_armeb +#define parser_context_save parser_context_save_armeb +#define parse_str parse_str_armeb +#define parse_type_bool parse_type_bool_armeb +#define parse_type_int parse_type_int_armeb +#define parse_type_number parse_type_number_armeb +#define parse_type_size parse_type_size_armeb +#define parse_type_str parse_type_str_armeb +#define parse_value parse_value_armeb +#define par_write par_write_armeb +#define patch_reloc patch_reloc_armeb +#define phys_map_node_alloc phys_map_node_alloc_armeb +#define phys_map_node_reserve phys_map_node_reserve_armeb +#define phys_mem_alloc phys_mem_alloc_armeb +#define phys_mem_set_alloc phys_mem_set_alloc_armeb +#define phys_page_compact phys_page_compact_armeb +#define phys_page_compact_all phys_page_compact_all_armeb +#define phys_page_find phys_page_find_armeb +#define phys_page_set phys_page_set_armeb +#define phys_page_set_level phys_page_set_level_armeb +#define phys_section_add phys_section_add_armeb +#define phys_section_destroy phys_section_destroy_armeb +#define phys_sections_free phys_sections_free_armeb +#define pickNaN pickNaN_armeb +#define pickNaNMulAdd pickNaNMulAdd_armeb +#define pmccfiltr_write pmccfiltr_write_armeb +#define pmccntr_read pmccntr_read_armeb +#define pmccntr_sync pmccntr_sync_armeb +#define pmccntr_write pmccntr_write_armeb +#define pmccntr_write32 pmccntr_write32_armeb +#define pmcntenclr_write pmcntenclr_write_armeb +#define pmcntenset_write pmcntenset_write_armeb +#define pmcr_write pmcr_write_armeb +#define pmintenclr_write pmintenclr_write_armeb +#define pmintenset_write pmintenset_write_armeb +#define pmovsr_write pmovsr_write_armeb +#define pmreg_access pmreg_access_armeb +#define pmsav5_cp_reginfo pmsav5_cp_reginfo_armeb +#define pmsav5_data_ap_read pmsav5_data_ap_read_armeb +#define pmsav5_data_ap_write pmsav5_data_ap_write_armeb +#define pmsav5_insn_ap_read pmsav5_insn_ap_read_armeb +#define pmsav5_insn_ap_write pmsav5_insn_ap_write_armeb +#define pmuserenr_write pmuserenr_write_armeb +#define pmxevtyper_write pmxevtyper_write_armeb +#define print_type_bool print_type_bool_armeb +#define print_type_int print_type_int_armeb +#define print_type_number print_type_number_armeb +#define print_type_size print_type_size_armeb +#define print_type_str print_type_str_armeb +#define propagateFloat128NaN propagateFloat128NaN_armeb +#define propagateFloat32MulAddNaN propagateFloat32MulAddNaN_armeb +#define propagateFloat32NaN propagateFloat32NaN_armeb +#define propagateFloat64MulAddNaN propagateFloat64MulAddNaN_armeb +#define propagateFloat64NaN propagateFloat64NaN_armeb +#define propagateFloatx80NaN propagateFloatx80NaN_armeb +#define property_get_alias property_get_alias_armeb +#define property_get_bool property_get_bool_armeb +#define property_get_str property_get_str_armeb +#define property_get_uint16_ptr property_get_uint16_ptr_armeb +#define property_get_uint32_ptr property_get_uint32_ptr_armeb +#define property_get_uint64_ptr property_get_uint64_ptr_armeb +#define property_get_uint8_ptr property_get_uint8_ptr_armeb +#define property_release_alias property_release_alias_armeb +#define property_release_bool property_release_bool_armeb +#define property_release_str property_release_str_armeb +#define property_resolve_alias property_resolve_alias_armeb +#define property_set_alias property_set_alias_armeb +#define property_set_bool property_set_bool_armeb +#define property_set_str property_set_str_armeb +#define pstate_read pstate_read_armeb +#define pstate_write pstate_write_armeb +#define pxa250_initfn pxa250_initfn_armeb +#define pxa255_initfn pxa255_initfn_armeb +#define pxa260_initfn pxa260_initfn_armeb +#define pxa261_initfn pxa261_initfn_armeb +#define pxa262_initfn pxa262_initfn_armeb +#define pxa270a0_initfn pxa270a0_initfn_armeb +#define pxa270a1_initfn pxa270a1_initfn_armeb +#define pxa270b0_initfn pxa270b0_initfn_armeb +#define pxa270b1_initfn pxa270b1_initfn_armeb +#define pxa270c0_initfn pxa270c0_initfn_armeb +#define pxa270c5_initfn pxa270c5_initfn_armeb +#define qapi_dealloc_end_implicit_struct qapi_dealloc_end_implicit_struct_armeb +#define qapi_dealloc_end_list qapi_dealloc_end_list_armeb +#define qapi_dealloc_end_struct qapi_dealloc_end_struct_armeb +#define qapi_dealloc_get_visitor qapi_dealloc_get_visitor_armeb +#define qapi_dealloc_next_list qapi_dealloc_next_list_armeb +#define qapi_dealloc_pop qapi_dealloc_pop_armeb +#define qapi_dealloc_push qapi_dealloc_push_armeb +#define qapi_dealloc_start_implicit_struct qapi_dealloc_start_implicit_struct_armeb +#define qapi_dealloc_start_list qapi_dealloc_start_list_armeb +#define qapi_dealloc_start_struct qapi_dealloc_start_struct_armeb +#define qapi_dealloc_start_union qapi_dealloc_start_union_armeb +#define qapi_dealloc_type_bool qapi_dealloc_type_bool_armeb +#define qapi_dealloc_type_enum qapi_dealloc_type_enum_armeb +#define qapi_dealloc_type_int qapi_dealloc_type_int_armeb +#define qapi_dealloc_type_number qapi_dealloc_type_number_armeb +#define qapi_dealloc_type_size qapi_dealloc_type_size_armeb +#define qapi_dealloc_type_str qapi_dealloc_type_str_armeb +#define qapi_dealloc_visitor_cleanup qapi_dealloc_visitor_cleanup_armeb +#define qapi_dealloc_visitor_new qapi_dealloc_visitor_new_armeb +#define qapi_free_boolList qapi_free_boolList_armeb +#define qapi_free_ErrorClassList qapi_free_ErrorClassList_armeb +#define qapi_free_int16List qapi_free_int16List_armeb +#define qapi_free_int32List qapi_free_int32List_armeb +#define qapi_free_int64List qapi_free_int64List_armeb +#define qapi_free_int8List qapi_free_int8List_armeb +#define qapi_free_intList qapi_free_intList_armeb +#define qapi_free_numberList qapi_free_numberList_armeb +#define qapi_free_strList qapi_free_strList_armeb +#define qapi_free_uint16List qapi_free_uint16List_armeb +#define qapi_free_uint32List qapi_free_uint32List_armeb +#define qapi_free_uint64List qapi_free_uint64List_armeb +#define qapi_free_uint8List qapi_free_uint8List_armeb +#define qapi_free_X86CPUFeatureWordInfo qapi_free_X86CPUFeatureWordInfo_armeb +#define qapi_free_X86CPUFeatureWordInfoList qapi_free_X86CPUFeatureWordInfoList_armeb +#define qapi_free_X86CPURegister32List qapi_free_X86CPURegister32List_armeb +#define qbool_destroy_obj qbool_destroy_obj_armeb +#define qbool_from_int qbool_from_int_armeb +#define qbool_get_int qbool_get_int_armeb +#define qbool_type qbool_type_armeb +#define qbus_create qbus_create_armeb +#define qbus_create_inplace qbus_create_inplace_armeb +#define qbus_finalize qbus_finalize_armeb +#define qbus_initfn qbus_initfn_armeb +#define qbus_realize qbus_realize_armeb +#define qdev_create qdev_create_armeb +#define qdev_get_type qdev_get_type_armeb +#define qdev_register_types qdev_register_types_armeb +#define qdev_set_parent_bus qdev_set_parent_bus_armeb +#define qdev_try_create qdev_try_create_armeb +#define qdict_add_key qdict_add_key_armeb +#define qdict_array_split qdict_array_split_armeb +#define qdict_clone_shallow qdict_clone_shallow_armeb +#define qdict_del qdict_del_armeb +#define qdict_destroy_obj qdict_destroy_obj_armeb +#define qdict_entry_key qdict_entry_key_armeb +#define qdict_entry_value qdict_entry_value_armeb +#define qdict_extract_subqdict qdict_extract_subqdict_armeb +#define qdict_find qdict_find_armeb +#define qdict_first qdict_first_armeb +#define qdict_flatten qdict_flatten_armeb +#define qdict_flatten_qdict qdict_flatten_qdict_armeb +#define qdict_flatten_qlist qdict_flatten_qlist_armeb +#define qdict_get qdict_get_armeb +#define qdict_get_bool qdict_get_bool_armeb +#define qdict_get_double qdict_get_double_armeb +#define qdict_get_int qdict_get_int_armeb +#define qdict_get_obj qdict_get_obj_armeb +#define qdict_get_qdict qdict_get_qdict_armeb +#define qdict_get_qlist qdict_get_qlist_armeb +#define qdict_get_str qdict_get_str_armeb +#define qdict_get_try_bool qdict_get_try_bool_armeb +#define qdict_get_try_int qdict_get_try_int_armeb +#define qdict_get_try_str qdict_get_try_str_armeb +#define qdict_haskey qdict_haskey_armeb +#define qdict_has_prefixed_entries qdict_has_prefixed_entries_armeb +#define qdict_iter qdict_iter_armeb +#define qdict_join qdict_join_armeb +#define qdict_new qdict_new_armeb +#define qdict_next qdict_next_armeb +#define qdict_next_entry qdict_next_entry_armeb +#define qdict_put_obj qdict_put_obj_armeb +#define qdict_size qdict_size_armeb +#define qdict_type qdict_type_armeb +#define qemu_clock_get_us qemu_clock_get_us_armeb +#define qemu_clock_ptr qemu_clock_ptr_armeb +#define qemu_clocks qemu_clocks_armeb +#define qemu_get_cpu qemu_get_cpu_armeb +#define qemu_get_guest_memory_mapping qemu_get_guest_memory_mapping_armeb +#define qemu_get_guest_simple_memory_mapping qemu_get_guest_simple_memory_mapping_armeb +#define qemu_get_ram_block qemu_get_ram_block_armeb +#define qemu_get_ram_block_host_ptr qemu_get_ram_block_host_ptr_armeb +#define qemu_get_ram_fd qemu_get_ram_fd_armeb +#define qemu_get_ram_ptr qemu_get_ram_ptr_armeb +#define qemu_host_page_mask qemu_host_page_mask_armeb +#define qemu_host_page_size qemu_host_page_size_armeb +#define qemu_init_vcpu qemu_init_vcpu_armeb +#define qemu_ld_helpers qemu_ld_helpers_armeb +#define qemu_log_close qemu_log_close_armeb +#define qemu_log_enabled qemu_log_enabled_armeb +#define qemu_log_flush qemu_log_flush_armeb +#define qemu_loglevel_mask qemu_loglevel_mask_armeb +#define qemu_log_vprintf qemu_log_vprintf_armeb +#define qemu_oom_check qemu_oom_check_armeb +#define qemu_parse_fd qemu_parse_fd_armeb +#define qemu_ram_addr_from_host qemu_ram_addr_from_host_armeb +#define qemu_ram_addr_from_host_nofail qemu_ram_addr_from_host_nofail_armeb +#define qemu_ram_alloc qemu_ram_alloc_armeb +#define qemu_ram_alloc_from_ptr qemu_ram_alloc_from_ptr_armeb +#define qemu_ram_foreach_block qemu_ram_foreach_block_armeb +#define qemu_ram_free qemu_ram_free_armeb +#define qemu_ram_free_from_ptr qemu_ram_free_from_ptr_armeb +#define qemu_ram_ptr_length qemu_ram_ptr_length_armeb +#define qemu_ram_remap qemu_ram_remap_armeb +#define qemu_ram_setup_dump qemu_ram_setup_dump_armeb +#define qemu_ram_unset_idstr qemu_ram_unset_idstr_armeb +#define qemu_real_host_page_size qemu_real_host_page_size_armeb +#define qemu_st_helpers qemu_st_helpers_armeb +#define qemu_tcg_init_vcpu qemu_tcg_init_vcpu_armeb +#define qemu_try_memalign qemu_try_memalign_armeb +#define qentry_destroy qentry_destroy_armeb +#define qerror_human qerror_human_armeb +#define qerror_report qerror_report_armeb +#define qerror_report_err qerror_report_err_armeb +#define qfloat_destroy_obj qfloat_destroy_obj_armeb +#define qfloat_from_double qfloat_from_double_armeb +#define qfloat_get_double qfloat_get_double_armeb +#define qfloat_type qfloat_type_armeb +#define qint_destroy_obj qint_destroy_obj_armeb +#define qint_from_int qint_from_int_armeb +#define qint_get_int qint_get_int_armeb +#define qint_type qint_type_armeb +#define qlist_append_obj qlist_append_obj_armeb +#define qlist_copy qlist_copy_armeb +#define qlist_copy_elem qlist_copy_elem_armeb +#define qlist_destroy_obj qlist_destroy_obj_armeb +#define qlist_empty qlist_empty_armeb +#define qlist_entry_obj qlist_entry_obj_armeb +#define qlist_first qlist_first_armeb +#define qlist_iter qlist_iter_armeb +#define qlist_new qlist_new_armeb +#define qlist_next qlist_next_armeb +#define qlist_peek qlist_peek_armeb +#define qlist_pop qlist_pop_armeb +#define qlist_size qlist_size_armeb +#define qlist_size_iter qlist_size_iter_armeb +#define qlist_type qlist_type_armeb +#define qmp_input_end_implicit_struct qmp_input_end_implicit_struct_armeb +#define qmp_input_end_list qmp_input_end_list_armeb +#define qmp_input_end_struct qmp_input_end_struct_armeb +#define qmp_input_get_next_type qmp_input_get_next_type_armeb +#define qmp_input_get_object qmp_input_get_object_armeb +#define qmp_input_get_visitor qmp_input_get_visitor_armeb +#define qmp_input_next_list qmp_input_next_list_armeb +#define qmp_input_optional qmp_input_optional_armeb +#define qmp_input_pop qmp_input_pop_armeb +#define qmp_input_push qmp_input_push_armeb +#define qmp_input_start_implicit_struct qmp_input_start_implicit_struct_armeb +#define qmp_input_start_list qmp_input_start_list_armeb +#define qmp_input_start_struct qmp_input_start_struct_armeb +#define qmp_input_type_bool qmp_input_type_bool_armeb +#define qmp_input_type_int qmp_input_type_int_armeb +#define qmp_input_type_number qmp_input_type_number_armeb +#define qmp_input_type_str qmp_input_type_str_armeb +#define qmp_input_visitor_cleanup qmp_input_visitor_cleanup_armeb +#define qmp_input_visitor_new qmp_input_visitor_new_armeb +#define qmp_input_visitor_new_strict qmp_input_visitor_new_strict_armeb +#define qmp_output_add_obj qmp_output_add_obj_armeb +#define qmp_output_end_list qmp_output_end_list_armeb +#define qmp_output_end_struct qmp_output_end_struct_armeb +#define qmp_output_first qmp_output_first_armeb +#define qmp_output_get_qobject qmp_output_get_qobject_armeb +#define qmp_output_get_visitor qmp_output_get_visitor_armeb +#define qmp_output_last qmp_output_last_armeb +#define qmp_output_next_list qmp_output_next_list_armeb +#define qmp_output_pop qmp_output_pop_armeb +#define qmp_output_push_obj qmp_output_push_obj_armeb +#define qmp_output_start_list qmp_output_start_list_armeb +#define qmp_output_start_struct qmp_output_start_struct_armeb +#define qmp_output_type_bool qmp_output_type_bool_armeb +#define qmp_output_type_int qmp_output_type_int_armeb +#define qmp_output_type_number qmp_output_type_number_armeb +#define qmp_output_type_str qmp_output_type_str_armeb +#define qmp_output_visitor_cleanup qmp_output_visitor_cleanup_armeb +#define qmp_output_visitor_new qmp_output_visitor_new_armeb +#define qobject_decref qobject_decref_armeb +#define qobject_to_qbool qobject_to_qbool_armeb +#define qobject_to_qdict qobject_to_qdict_armeb +#define qobject_to_qfloat qobject_to_qfloat_armeb +#define qobject_to_qint qobject_to_qint_armeb +#define qobject_to_qlist qobject_to_qlist_armeb +#define qobject_to_qstring qobject_to_qstring_armeb +#define qobject_type qobject_type_armeb +#define qstring_append qstring_append_armeb +#define qstring_append_chr qstring_append_chr_armeb +#define qstring_append_int qstring_append_int_armeb +#define qstring_destroy_obj qstring_destroy_obj_armeb +#define qstring_from_escaped_str qstring_from_escaped_str_armeb +#define qstring_from_str qstring_from_str_armeb +#define qstring_from_substr qstring_from_substr_armeb +#define qstring_get_length qstring_get_length_armeb +#define qstring_get_str qstring_get_str_armeb +#define qstring_new qstring_new_armeb +#define qstring_type qstring_type_armeb +#define ram_block_add ram_block_add_armeb +#define ram_size ram_size_armeb +#define range_compare range_compare_armeb +#define range_covers_byte range_covers_byte_armeb +#define range_get_last range_get_last_armeb +#define range_merge range_merge_armeb +#define ranges_can_merge ranges_can_merge_armeb +#define raw_read raw_read_armeb +#define raw_write raw_write_armeb +#define rcon rcon_armeb +#define read_raw_cp_reg read_raw_cp_reg_armeb +#define recip_estimate recip_estimate_armeb +#define recip_sqrt_estimate recip_sqrt_estimate_armeb +#define register_cp_regs_for_features register_cp_regs_for_features_armeb +#define register_multipage register_multipage_armeb +#define register_subpage register_subpage_armeb +#define register_tm_clones register_tm_clones_armeb +#define register_types_object register_types_object_armeb +#define regnames regnames_armeb +#define render_memory_region render_memory_region_armeb +#define reset_all_temps reset_all_temps_armeb +#define reset_temp reset_temp_armeb +#define rol32 rol32_armeb +#define rol64 rol64_armeb +#define ror32 ror32_armeb +#define ror64 ror64_armeb +#define roundAndPackFloat128 roundAndPackFloat128_armeb +#define roundAndPackFloat16 roundAndPackFloat16_armeb +#define roundAndPackFloat32 roundAndPackFloat32_armeb +#define roundAndPackFloat64 roundAndPackFloat64_armeb +#define roundAndPackFloatx80 roundAndPackFloatx80_armeb +#define roundAndPackInt32 roundAndPackInt32_armeb +#define roundAndPackInt64 roundAndPackInt64_armeb +#define roundAndPackUint64 roundAndPackUint64_armeb +#define round_to_inf round_to_inf_armeb +#define run_on_cpu run_on_cpu_armeb +#define s0 s0_armeb +#define S0 S0_armeb +#define s1 s1_armeb +#define S1 S1_armeb +#define sa1100_initfn sa1100_initfn_armeb +#define sa1110_initfn sa1110_initfn_armeb +#define save_globals save_globals_armeb +#define scr_write scr_write_armeb +#define sctlr_write sctlr_write_armeb +#define set_bit set_bit_armeb +#define set_bits set_bits_armeb +#define set_default_nan_mode set_default_nan_mode_armeb +#define set_feature set_feature_armeb +#define set_float_detect_tininess set_float_detect_tininess_armeb +#define set_float_exception_flags set_float_exception_flags_armeb +#define set_float_rounding_mode set_float_rounding_mode_armeb +#define set_flush_inputs_to_zero set_flush_inputs_to_zero_armeb +#define set_flush_to_zero set_flush_to_zero_armeb +#define set_swi_errno set_swi_errno_armeb +#define sextract32 sextract32_armeb +#define sextract64 sextract64_armeb +#define shift128ExtraRightJamming shift128ExtraRightJamming_armeb +#define shift128Right shift128Right_armeb +#define shift128RightJamming shift128RightJamming_armeb +#define shift32RightJamming shift32RightJamming_armeb +#define shift64ExtraRightJamming shift64ExtraRightJamming_armeb +#define shift64RightJamming shift64RightJamming_armeb +#define shifter_out_im shifter_out_im_armeb +#define shortShift128Left shortShift128Left_armeb +#define shortShift192Left shortShift192Left_armeb +#define simple_mpu_ap_bits simple_mpu_ap_bits_armeb +#define size_code_gen_buffer size_code_gen_buffer_armeb +#define softmmu_lock_user softmmu_lock_user_armeb +#define softmmu_lock_user_string softmmu_lock_user_string_armeb +#define softmmu_tget32 softmmu_tget32_armeb +#define softmmu_tget8 softmmu_tget8_armeb +#define softmmu_tput32 softmmu_tput32_armeb +#define softmmu_unlock_user softmmu_unlock_user_armeb +#define sort_constraints sort_constraints_armeb +#define sp_el0_access sp_el0_access_armeb +#define spsel_read spsel_read_armeb +#define spsel_write spsel_write_armeb +#define start_list start_list_armeb +#define stb_p stb_p_armeb +#define stb_phys stb_phys_armeb +#define stl_be_p stl_be_p_armeb +#define stl_be_phys stl_be_phys_armeb +#define stl_he_p stl_he_p_armeb +#define stl_le_p stl_le_p_armeb +#define stl_le_phys stl_le_phys_armeb +#define stl_phys stl_phys_armeb +#define stl_phys_internal stl_phys_internal_armeb +#define stl_phys_notdirty stl_phys_notdirty_armeb +#define store_cpu_offset store_cpu_offset_armeb +#define store_reg store_reg_armeb +#define store_reg_bx store_reg_bx_armeb +#define store_reg_from_load store_reg_from_load_armeb +#define stq_be_p stq_be_p_armeb +#define stq_be_phys stq_be_phys_armeb +#define stq_he_p stq_he_p_armeb +#define stq_le_p stq_le_p_armeb +#define stq_le_phys stq_le_phys_armeb +#define stq_phys stq_phys_armeb +#define string_input_get_visitor string_input_get_visitor_armeb +#define string_input_visitor_cleanup string_input_visitor_cleanup_armeb +#define string_input_visitor_new string_input_visitor_new_armeb +#define strongarmeb_cp_reginfo strongarmeb_cp_reginfo_armeb +#define strstart strstart_armeb +#define strtosz strtosz_armeb +#define strtosz_suffix strtosz_suffix_armeb +#define stw_be_p stw_be_p_armeb +#define stw_be_phys stw_be_phys_armeb +#define stw_he_p stw_he_p_armeb +#define stw_le_p stw_le_p_armeb +#define stw_le_phys stw_le_phys_armeb +#define stw_phys stw_phys_armeb +#define stw_phys_internal stw_phys_internal_armeb +#define sub128 sub128_armeb +#define sub16_sat sub16_sat_armeb +#define sub16_usat sub16_usat_armeb +#define sub192 sub192_armeb +#define sub8_sat sub8_sat_armeb +#define sub8_usat sub8_usat_armeb +#define subFloat128Sigs subFloat128Sigs_armeb +#define subFloat32Sigs subFloat32Sigs_armeb +#define subFloat64Sigs subFloat64Sigs_armeb +#define subFloatx80Sigs subFloatx80Sigs_armeb +#define subpage_accepts subpage_accepts_armeb +#define subpage_init subpage_init_armeb +#define subpage_ops subpage_ops_armeb +#define subpage_read subpage_read_armeb +#define subpage_register subpage_register_armeb +#define subpage_write subpage_write_armeb +#define suffix_mul suffix_mul_armeb +#define swap_commutative swap_commutative_armeb +#define swap_commutative2 swap_commutative2_armeb +#define switch_mode switch_mode_armeb +#define switch_v7m_sp switch_v7m_sp_armeb +#define syn_aa32_bkpt syn_aa32_bkpt_armeb +#define syn_aa32_hvc syn_aa32_hvc_armeb +#define syn_aa32_smc syn_aa32_smc_armeb +#define syn_aa32_svc syn_aa32_svc_armeb +#define syn_breakpoint syn_breakpoint_armeb +#define sync_globals sync_globals_armeb +#define syn_cp14_rrt_trap syn_cp14_rrt_trap_armeb +#define syn_cp14_rt_trap syn_cp14_rt_trap_armeb +#define syn_cp15_rrt_trap syn_cp15_rrt_trap_armeb +#define syn_cp15_rt_trap syn_cp15_rt_trap_armeb +#define syn_data_abort syn_data_abort_armeb +#define syn_fp_access_trap syn_fp_access_trap_armeb +#define syn_insn_abort syn_insn_abort_armeb +#define syn_swstep syn_swstep_armeb +#define syn_uncategorized syn_uncategorized_armeb +#define syn_watchpoint syn_watchpoint_armeb +#define syscall_err syscall_err_armeb +#define system_bus_class_init system_bus_class_init_armeb +#define system_bus_info system_bus_info_armeb +#define t2ee_cp_reginfo t2ee_cp_reginfo_armeb +#define table_logic_cc table_logic_cc_armeb +#define target_parse_constraint target_parse_constraint_armeb +#define target_words_bigendian target_words_bigendian_armeb +#define tb_add_jump tb_add_jump_armeb +#define tb_alloc tb_alloc_armeb +#define tb_alloc_page tb_alloc_page_armeb +#define tb_check_watchpoint tb_check_watchpoint_armeb +#define tb_find_fast tb_find_fast_armeb +#define tb_find_pc tb_find_pc_armeb +#define tb_find_slow tb_find_slow_armeb +#define tb_flush tb_flush_armeb +#define tb_flush_jmp_cache tb_flush_jmp_cache_armeb +#define tb_free tb_free_armeb +#define tb_gen_code tb_gen_code_armeb +#define tb_hash_remove tb_hash_remove_armeb +#define tb_invalidate_phys_addr tb_invalidate_phys_addr_armeb +#define tb_invalidate_phys_page_range tb_invalidate_phys_page_range_armeb +#define tb_invalidate_phys_range tb_invalidate_phys_range_armeb +#define tb_jmp_cache_hash_func tb_jmp_cache_hash_func_armeb +#define tb_jmp_cache_hash_page tb_jmp_cache_hash_page_armeb +#define tb_jmp_remove tb_jmp_remove_armeb +#define tb_link_page tb_link_page_armeb +#define tb_page_remove tb_page_remove_armeb +#define tb_phys_hash_func tb_phys_hash_func_armeb +#define tb_phys_invalidate tb_phys_invalidate_armeb +#define tb_reset_jump tb_reset_jump_armeb +#define tb_set_jmp_target tb_set_jmp_target_armeb +#define tcg_accel_class_init tcg_accel_class_init_armeb +#define tcg_accel_type tcg_accel_type_armeb +#define tcg_add_param_i32 tcg_add_param_i32_armeb +#define tcg_add_param_i64 tcg_add_param_i64_armeb +#define tcg_add_target_add_op_defs tcg_add_target_add_op_defs_armeb +#define tcg_allowed tcg_allowed_armeb +#define tcg_canonicalize_memop tcg_canonicalize_memop_armeb +#define tcg_commit tcg_commit_armeb +#define tcg_cond_to_jcc tcg_cond_to_jcc_armeb +#define tcg_constant_folding tcg_constant_folding_armeb +#define tcg_const_i32 tcg_const_i32_armeb +#define tcg_const_i64 tcg_const_i64_armeb +#define tcg_const_local_i32 tcg_const_local_i32_armeb +#define tcg_const_local_i64 tcg_const_local_i64_armeb +#define tcg_context_init tcg_context_init_armeb +#define tcg_cpu_address_space_init tcg_cpu_address_space_init_armeb +#define tcg_cpu_exec tcg_cpu_exec_armeb +#define tcg_current_code_size tcg_current_code_size_armeb +#define tcg_dump_info tcg_dump_info_armeb +#define tcg_dump_ops tcg_dump_ops_armeb +#define tcg_exec_all tcg_exec_all_armeb +#define tcg_find_helper tcg_find_helper_armeb +#define tcg_func_start tcg_func_start_armeb +#define tcg_gen_abs_i32 tcg_gen_abs_i32_armeb +#define tcg_gen_add2_i32 tcg_gen_add2_i32_armeb +#define tcg_gen_add_i32 tcg_gen_add_i32_armeb +#define tcg_gen_add_i64 tcg_gen_add_i64_armeb +#define tcg_gen_addi_i32 tcg_gen_addi_i32_armeb +#define tcg_gen_addi_i64 tcg_gen_addi_i64_armeb +#define tcg_gen_andc_i32 tcg_gen_andc_i32_armeb +#define tcg_gen_and_i32 tcg_gen_and_i32_armeb +#define tcg_gen_and_i64 tcg_gen_and_i64_armeb +#define tcg_gen_andi_i32 tcg_gen_andi_i32_armeb +#define tcg_gen_andi_i64 tcg_gen_andi_i64_armeb +#define tcg_gen_br tcg_gen_br_armeb +#define tcg_gen_brcond_i32 tcg_gen_brcond_i32_armeb +#define tcg_gen_brcond_i64 tcg_gen_brcond_i64_armeb +#define tcg_gen_brcondi_i32 tcg_gen_brcondi_i32_armeb +#define tcg_gen_bswap16_i32 tcg_gen_bswap16_i32_armeb +#define tcg_gen_bswap32_i32 tcg_gen_bswap32_i32_armeb +#define tcg_gen_callN tcg_gen_callN_armeb +#define tcg_gen_code tcg_gen_code_armeb +#define tcg_gen_code_common tcg_gen_code_common_armeb +#define tcg_gen_code_search_pc tcg_gen_code_search_pc_armeb +#define tcg_gen_concat_i32_i64 tcg_gen_concat_i32_i64_armeb +#define tcg_gen_debug_insn_start tcg_gen_debug_insn_start_armeb +#define tcg_gen_deposit_i32 tcg_gen_deposit_i32_armeb +#define tcg_gen_exit_tb tcg_gen_exit_tb_armeb +#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_armeb +#define tcg_gen_ext16u_i32 tcg_gen_ext16u_i32_armeb +#define tcg_gen_ext32s_i64 tcg_gen_ext32s_i64_armeb +#define tcg_gen_ext32u_i64 tcg_gen_ext32u_i64_armeb +#define tcg_gen_ext8s_i32 tcg_gen_ext8s_i32_armeb +#define tcg_gen_ext8u_i32 tcg_gen_ext8u_i32_armeb +#define tcg_gen_ext_i32_i64 tcg_gen_ext_i32_i64_armeb +#define tcg_gen_extu_i32_i64 tcg_gen_extu_i32_i64_armeb +#define tcg_gen_goto_tb tcg_gen_goto_tb_armeb +#define tcg_gen_ld_i32 tcg_gen_ld_i32_armeb +#define tcg_gen_ld_i64 tcg_gen_ld_i64_armeb +#define tcg_gen_ldst_op_i32 tcg_gen_ldst_op_i32_armeb +#define tcg_gen_ldst_op_i64 tcg_gen_ldst_op_i64_armeb +#define tcg_gen_movcond_i32 tcg_gen_movcond_i32_armeb +#define tcg_gen_movcond_i64 tcg_gen_movcond_i64_armeb +#define tcg_gen_mov_i32 tcg_gen_mov_i32_armeb +#define tcg_gen_mov_i64 tcg_gen_mov_i64_armeb +#define tcg_gen_movi_i32 tcg_gen_movi_i32_armeb +#define tcg_gen_movi_i64 tcg_gen_movi_i64_armeb +#define tcg_gen_mul_i32 tcg_gen_mul_i32_armeb +#define tcg_gen_muls2_i32 tcg_gen_muls2_i32_armeb +#define tcg_gen_mulu2_i32 tcg_gen_mulu2_i32_armeb +#define tcg_gen_neg_i32 tcg_gen_neg_i32_armeb +#define tcg_gen_neg_i64 tcg_gen_neg_i64_armeb +#define tcg_gen_not_i32 tcg_gen_not_i32_armeb +#define tcg_gen_op0 tcg_gen_op0_armeb +#define tcg_gen_op1i tcg_gen_op1i_armeb +#define tcg_gen_op2_i32 tcg_gen_op2_i32_armeb +#define tcg_gen_op2_i64 tcg_gen_op2_i64_armeb +#define tcg_gen_op2i_i32 tcg_gen_op2i_i32_armeb +#define tcg_gen_op2i_i64 tcg_gen_op2i_i64_armeb +#define tcg_gen_op3_i32 tcg_gen_op3_i32_armeb +#define tcg_gen_op3_i64 tcg_gen_op3_i64_armeb +#define tcg_gen_op4_i32 tcg_gen_op4_i32_armeb +#define tcg_gen_op4i_i32 tcg_gen_op4i_i32_armeb +#define tcg_gen_op4ii_i32 tcg_gen_op4ii_i32_armeb +#define tcg_gen_op4ii_i64 tcg_gen_op4ii_i64_armeb +#define tcg_gen_op5ii_i32 tcg_gen_op5ii_i32_armeb +#define tcg_gen_op6_i32 tcg_gen_op6_i32_armeb +#define tcg_gen_op6i_i32 tcg_gen_op6i_i32_armeb +#define tcg_gen_op6i_i64 tcg_gen_op6i_i64_armeb +#define tcg_gen_orc_i32 tcg_gen_orc_i32_armeb +#define tcg_gen_or_i32 tcg_gen_or_i32_armeb +#define tcg_gen_or_i64 tcg_gen_or_i64_armeb +#define tcg_gen_ori_i32 tcg_gen_ori_i32_armeb +#define tcg_gen_qemu_ld_i32 tcg_gen_qemu_ld_i32_armeb +#define tcg_gen_qemu_ld_i64 tcg_gen_qemu_ld_i64_armeb +#define tcg_gen_qemu_st_i32 tcg_gen_qemu_st_i32_armeb +#define tcg_gen_qemu_st_i64 tcg_gen_qemu_st_i64_armeb +#define tcg_gen_rotl_i32 tcg_gen_rotl_i32_armeb +#define tcg_gen_rotli_i32 tcg_gen_rotli_i32_armeb +#define tcg_gen_rotr_i32 tcg_gen_rotr_i32_armeb +#define tcg_gen_rotri_i32 tcg_gen_rotri_i32_armeb +#define tcg_gen_sar_i32 tcg_gen_sar_i32_armeb +#define tcg_gen_sari_i32 tcg_gen_sari_i32_armeb +#define tcg_gen_setcond_i32 tcg_gen_setcond_i32_armeb +#define tcg_gen_shl_i32 tcg_gen_shl_i32_armeb +#define tcg_gen_shl_i64 tcg_gen_shl_i64_armeb +#define tcg_gen_shli_i32 tcg_gen_shli_i32_armeb +#define tcg_gen_shli_i64 tcg_gen_shli_i64_armeb +#define tcg_gen_shr_i32 tcg_gen_shr_i32_armeb +#define tcg_gen_shifti_i64 tcg_gen_shifti_i64_armeb +#define tcg_gen_shr_i64 tcg_gen_shr_i64_armeb +#define tcg_gen_shri_i32 tcg_gen_shri_i32_armeb +#define tcg_gen_shri_i64 tcg_gen_shri_i64_armeb +#define tcg_gen_st_i32 tcg_gen_st_i32_armeb +#define tcg_gen_st_i64 tcg_gen_st_i64_armeb +#define tcg_gen_sub_i32 tcg_gen_sub_i32_armeb +#define tcg_gen_sub_i64 tcg_gen_sub_i64_armeb +#define tcg_gen_subi_i32 tcg_gen_subi_i32_armeb +#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_armeb +#define tcg_gen_trunc_shr_i64_i32 tcg_gen_trunc_shr_i64_i32_armeb +#define tcg_gen_xor_i32 tcg_gen_xor_i32_armeb +#define tcg_gen_xor_i64 tcg_gen_xor_i64_armeb +#define tcg_gen_xori_i32 tcg_gen_xori_i32_armeb +#define tcg_get_arg_str_i32 tcg_get_arg_str_i32_armeb +#define tcg_get_arg_str_i64 tcg_get_arg_str_i64_armeb +#define tcg_get_arg_str_idx tcg_get_arg_str_idx_armeb +#define tcg_global_mem_new_i32 tcg_global_mem_new_i32_armeb +#define tcg_global_mem_new_i64 tcg_global_mem_new_i64_armeb +#define tcg_global_mem_new_internal tcg_global_mem_new_internal_armeb +#define tcg_global_reg_new_i32 tcg_global_reg_new_i32_armeb +#define tcg_global_reg_new_i64 tcg_global_reg_new_i64_armeb +#define tcg_global_reg_new_internal tcg_global_reg_new_internal_armeb +#define tcg_handle_interrupt tcg_handle_interrupt_armeb +#define tcg_init tcg_init_armeb +#define tcg_invert_cond tcg_invert_cond_armeb +#define tcg_la_bb_end tcg_la_bb_end_armeb +#define tcg_la_br_end tcg_la_br_end_armeb +#define tcg_la_func_end tcg_la_func_end_armeb +#define tcg_liveness_analysis tcg_liveness_analysis_armeb +#define tcg_malloc tcg_malloc_armeb +#define tcg_malloc_internal tcg_malloc_internal_armeb +#define tcg_op_defs_org tcg_op_defs_org_armeb +#define tcg_opt_gen_mov tcg_opt_gen_mov_armeb +#define tcg_opt_gen_movi tcg_opt_gen_movi_armeb +#define tcg_optimize tcg_optimize_armeb +#define tcg_out16 tcg_out16_armeb +#define tcg_out32 tcg_out32_armeb +#define tcg_out64 tcg_out64_armeb +#define tcg_out8 tcg_out8_armeb +#define tcg_out_addi tcg_out_addi_armeb +#define tcg_out_branch tcg_out_branch_armeb +#define tcg_out_brcond32 tcg_out_brcond32_armeb +#define tcg_out_brcond64 tcg_out_brcond64_armeb +#define tcg_out_bswap32 tcg_out_bswap32_armeb +#define tcg_out_bswap64 tcg_out_bswap64_armeb +#define tcg_out_call tcg_out_call_armeb +#define tcg_out_cmp tcg_out_cmp_armeb +#define tcg_out_ext16s tcg_out_ext16s_armeb +#define tcg_out_ext16u tcg_out_ext16u_armeb +#define tcg_out_ext32s tcg_out_ext32s_armeb +#define tcg_out_ext32u tcg_out_ext32u_armeb +#define tcg_out_ext8s tcg_out_ext8s_armeb +#define tcg_out_ext8u tcg_out_ext8u_armeb +#define tcg_out_jmp tcg_out_jmp_armeb +#define tcg_out_jxx tcg_out_jxx_armeb +#define tcg_out_label tcg_out_label_armeb +#define tcg_out_ld tcg_out_ld_armeb +#define tcg_out_modrm tcg_out_modrm_armeb +#define tcg_out_modrm_offset tcg_out_modrm_offset_armeb +#define tcg_out_modrm_sib_offset tcg_out_modrm_sib_offset_armeb +#define tcg_out_mov tcg_out_mov_armeb +#define tcg_out_movcond32 tcg_out_movcond32_armeb +#define tcg_out_movcond64 tcg_out_movcond64_armeb +#define tcg_out_movi tcg_out_movi_armeb +#define tcg_out_op tcg_out_op_armeb +#define tcg_out_pop tcg_out_pop_armeb +#define tcg_out_push tcg_out_push_armeb +#define tcg_out_qemu_ld tcg_out_qemu_ld_armeb +#define tcg_out_qemu_ld_direct tcg_out_qemu_ld_direct_armeb +#define tcg_out_qemu_ld_slow_path tcg_out_qemu_ld_slow_path_armeb +#define tcg_out_qemu_st tcg_out_qemu_st_armeb +#define tcg_out_qemu_st_direct tcg_out_qemu_st_direct_armeb +#define tcg_out_qemu_st_slow_path tcg_out_qemu_st_slow_path_armeb +#define tcg_out_reloc tcg_out_reloc_armeb +#define tcg_out_rolw_8 tcg_out_rolw_8_armeb +#define tcg_out_setcond32 tcg_out_setcond32_armeb +#define tcg_out_setcond64 tcg_out_setcond64_armeb +#define tcg_out_shifti tcg_out_shifti_armeb +#define tcg_out_st tcg_out_st_armeb +#define tcg_out_tb_finalize tcg_out_tb_finalize_armeb +#define tcg_out_tb_init tcg_out_tb_init_armeb +#define tcg_out_tlb_load tcg_out_tlb_load_armeb +#define tcg_out_vex_modrm tcg_out_vex_modrm_armeb +#define tcg_patch32 tcg_patch32_armeb +#define tcg_patch8 tcg_patch8_armeb +#define tcg_pcrel_diff tcg_pcrel_diff_armeb +#define tcg_pool_reset tcg_pool_reset_armeb +#define tcg_prologue_init tcg_prologue_init_armeb +#define tcg_ptr_byte_diff tcg_ptr_byte_diff_armeb +#define tcg_reg_alloc tcg_reg_alloc_armeb +#define tcg_reg_alloc_bb_end tcg_reg_alloc_bb_end_armeb +#define tcg_reg_alloc_call tcg_reg_alloc_call_armeb +#define tcg_reg_alloc_mov tcg_reg_alloc_mov_armeb +#define tcg_reg_alloc_movi tcg_reg_alloc_movi_armeb +#define tcg_reg_alloc_op tcg_reg_alloc_op_armeb +#define tcg_reg_alloc_start tcg_reg_alloc_start_armeb +#define tcg_reg_free tcg_reg_free_armeb +#define tcg_reg_sync tcg_reg_sync_armeb +#define tcg_set_frame tcg_set_frame_armeb +#define tcg_set_nop tcg_set_nop_armeb +#define tcg_swap_cond tcg_swap_cond_armeb +#define tcg_target_callee_save_regs tcg_target_callee_save_regs_armeb +#define tcg_target_call_iarg_regs tcg_target_call_iarg_regs_armeb +#define tcg_target_call_oarg_regs tcg_target_call_oarg_regs_armeb +#define tcg_target_const_match tcg_target_const_match_armeb +#define tcg_target_init tcg_target_init_armeb +#define tcg_target_qemu_prologue tcg_target_qemu_prologue_armeb +#define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_armeb +#define tcg_temp_alloc tcg_temp_alloc_armeb +#define tcg_temp_free_i32 tcg_temp_free_i32_armeb +#define tcg_temp_free_i64 tcg_temp_free_i64_armeb +#define tcg_temp_free_internal tcg_temp_free_internal_armeb +#define tcg_temp_local_new_i32 tcg_temp_local_new_i32_armeb +#define tcg_temp_local_new_i64 tcg_temp_local_new_i64_armeb +#define tcg_temp_new_i32 tcg_temp_new_i32_armeb +#define tcg_temp_new_i64 tcg_temp_new_i64_armeb +#define tcg_temp_new_internal tcg_temp_new_internal_armeb +#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_armeb +#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_armeb +#define tdb_hash tdb_hash_armeb +#define teecr_write teecr_write_armeb +#define teehbr_access teehbr_access_armeb +#define temp_allocate_frame temp_allocate_frame_armeb +#define temp_dead temp_dead_armeb +#define temps_are_copies temps_are_copies_armeb +#define temp_save temp_save_armeb +#define temp_sync temp_sync_armeb +#define tgen_arithi tgen_arithi_armeb +#define tgen_arithr tgen_arithr_armeb +#define thumb2_logic_op thumb2_logic_op_armeb +#define ti925t_initfn ti925t_initfn_armeb +#define tlb_add_large_page tlb_add_large_page_armeb +#define tlb_flush_entry tlb_flush_entry_armeb +#define tlbi_aa64_asid_is_write tlbi_aa64_asid_is_write_armeb +#define tlbi_aa64_asid_write tlbi_aa64_asid_write_armeb +#define tlbi_aa64_vaa_is_write tlbi_aa64_vaa_is_write_armeb +#define tlbi_aa64_vaa_write tlbi_aa64_vaa_write_armeb +#define tlbi_aa64_va_is_write tlbi_aa64_va_is_write_armeb +#define tlbi_aa64_va_write tlbi_aa64_va_write_armeb +#define tlbiall_is_write tlbiall_is_write_armeb +#define tlbiall_write tlbiall_write_armeb +#define tlbiasid_is_write tlbiasid_is_write_armeb +#define tlbiasid_write tlbiasid_write_armeb +#define tlbimvaa_is_write tlbimvaa_is_write_armeb +#define tlbimvaa_write tlbimvaa_write_armeb +#define tlbimva_is_write tlbimva_is_write_armeb +#define tlbimva_write tlbimva_write_armeb +#define tlb_is_dirty_ram tlb_is_dirty_ram_armeb +#define tlb_protect_code tlb_protect_code_armeb +#define tlb_reset_dirty_range tlb_reset_dirty_range_armeb +#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_armeb +#define tlb_set_dirty tlb_set_dirty_armeb +#define tlb_set_dirty1 tlb_set_dirty1_armeb +#define tlb_unprotect_code_phys tlb_unprotect_code_phys_armeb +#define tlb_vaddr_to_host tlb_vaddr_to_host_armeb +#define token_get_type token_get_type_armeb +#define token_get_value token_get_value_armeb +#define token_is_escape token_is_escape_armeb +#define token_is_keyword token_is_keyword_armeb +#define token_is_operator token_is_operator_armeb +#define tokens_append_from_iter tokens_append_from_iter_armeb +#define to_qiv to_qiv_armeb +#define to_qov to_qov_armeb +#define tosa_init tosa_init_armeb +#define tosa_machine_init tosa_machine_init_armeb +#define tswap32 tswap32_armeb +#define tswap64 tswap64_armeb +#define type_class_get_size type_class_get_size_armeb +#define type_get_by_name type_get_by_name_armeb +#define type_get_parent type_get_parent_armeb +#define type_has_parent type_has_parent_armeb +#define type_initialize type_initialize_armeb +#define type_initialize_interface type_initialize_interface_armeb +#define type_is_ancestor type_is_ancestor_armeb +#define type_new type_new_armeb +#define type_object_get_size type_object_get_size_armeb +#define type_register_internal type_register_internal_armeb +#define type_table_add type_table_add_armeb +#define type_table_get type_table_get_armeb +#define type_table_lookup type_table_lookup_armeb +#define uint16_to_float32 uint16_to_float32_armeb +#define uint16_to_float64 uint16_to_float64_armeb +#define uint32_to_float32 uint32_to_float32_armeb +#define uint32_to_float64 uint32_to_float64_armeb +#define uint64_to_float128 uint64_to_float128_armeb +#define uint64_to_float32 uint64_to_float32_armeb +#define uint64_to_float64 uint64_to_float64_armeb +#define unassigned_io_ops unassigned_io_ops_armeb +#define unassigned_io_read unassigned_io_read_armeb +#define unassigned_io_write unassigned_io_write_armeb +#define unassigned_mem_accepts unassigned_mem_accepts_armeb +#define unassigned_mem_ops unassigned_mem_ops_armeb +#define unassigned_mem_read unassigned_mem_read_armeb +#define unassigned_mem_write unassigned_mem_write_armeb +#define update_spsel update_spsel_armeb +#define v6_cp_reginfo v6_cp_reginfo_armeb +#define v6k_cp_reginfo v6k_cp_reginfo_armeb +#define v7_cp_reginfo v7_cp_reginfo_armeb +#define v7mp_cp_reginfo v7mp_cp_reginfo_armeb +#define v7m_pop v7m_pop_armeb +#define v7m_push v7m_push_armeb +#define v8_cp_reginfo v8_cp_reginfo_armeb +#define v8_el2_cp_reginfo v8_el2_cp_reginfo_armeb +#define v8_el3_cp_reginfo v8_el3_cp_reginfo_armeb +#define v8_el3_no_el2_cp_reginfo v8_el3_no_el2_cp_reginfo_armeb +#define vapa_cp_reginfo vapa_cp_reginfo_armeb +#define vbar_write vbar_write_armeb +#define vfp_exceptbits_from_host vfp_exceptbits_from_host_armeb +#define vfp_exceptbits_to_host vfp_exceptbits_to_host_armeb +#define vfp_get_fpcr vfp_get_fpcr_armeb +#define vfp_get_fpscr vfp_get_fpscr_armeb +#define vfp_get_fpsr vfp_get_fpsr_armeb +#define vfp_reg_offset vfp_reg_offset_armeb +#define vfp_set_fpcr vfp_set_fpcr_armeb +#define vfp_set_fpscr vfp_set_fpscr_armeb +#define vfp_set_fpsr vfp_set_fpsr_armeb +#define visit_end_implicit_struct visit_end_implicit_struct_armeb +#define visit_end_list visit_end_list_armeb +#define visit_end_struct visit_end_struct_armeb +#define visit_end_union visit_end_union_armeb +#define visit_get_next_type visit_get_next_type_armeb +#define visit_next_list visit_next_list_armeb +#define visit_optional visit_optional_armeb +#define visit_start_implicit_struct visit_start_implicit_struct_armeb +#define visit_start_list visit_start_list_armeb +#define visit_start_struct visit_start_struct_armeb +#define visit_start_union visit_start_union_armeb +#define vmsa_cp_reginfo vmsa_cp_reginfo_armeb +#define vmsa_tcr_el1_write vmsa_tcr_el1_write_armeb +#define vmsa_ttbcr_raw_write vmsa_ttbcr_raw_write_armeb +#define vmsa_ttbcr_reset vmsa_ttbcr_reset_armeb +#define vmsa_ttbcr_write vmsa_ttbcr_write_armeb +#define vmsa_ttbr_write vmsa_ttbr_write_armeb +#define write_cpustate_to_list write_cpustate_to_list_armeb +#define write_list_to_cpustate write_list_to_cpustate_armeb +#define write_raw_cp_reg write_raw_cp_reg_armeb +#define X86CPURegister32_lookup X86CPURegister32_lookup_armeb +#define x86_op_defs x86_op_defs_armeb +#define xpsr_read xpsr_read_armeb +#define xpsr_write xpsr_write_armeb +#define xscale_cpar_write xscale_cpar_write_armeb +#define xscale_cp_reginfo xscale_cp_reginfo_armeb +#define arm_release arm_release_armeb +#endif diff --git a/qemu/default-configs/armeb-softmmu.mak b/qemu/default-configs/armeb-softmmu.mak new file mode 100644 index 00000000..e69de29b diff --git a/qemu/target-arm/unicorn.h b/qemu/target-arm/unicorn.h index d8a02505..cb3b3bb1 100644 --- a/qemu/target-arm/unicorn.h +++ b/qemu/target-arm/unicorn.h @@ -15,6 +15,7 @@ void arm64_reg_reset(struct uc_struct *uc); __attribute__ ((visibility ("default"))) void arm_uc_init(struct uc_struct* uc); +void armeb_uc_init(struct uc_struct* uc); __attribute__ ((visibility ("default"))) void arm64_uc_init(struct uc_struct* uc); diff --git a/qemu/target-arm/unicorn_arm.c b/qemu/target-arm/unicorn_arm.c index 1dffb432..d84da0ed 100644 --- a/qemu/target-arm/unicorn_arm.c +++ b/qemu/target-arm/unicorn_arm.c @@ -9,8 +9,9 @@ #include "unicorn_common.h" #include "uc_priv.h" - +#ifndef TARGET_WORDS_BIGENDIAN const int ARM_REGS_STORAGE_SIZE = offsetof(CPUARMState, tlb_table); +#endif static void arm_set_pc(struct uc_struct *uc, uint64_t address) { @@ -181,7 +182,11 @@ static uc_err arm_query(struct uc_struct *uc, uc_query_type type, size_t *result } } +#ifdef TARGET_WORDS_BIGENDIAN +void armeb_uc_init(struct uc_struct* uc) +#else void arm_uc_init(struct uc_struct* uc) +#endif { register_accel_types(uc); arm_cpu_register_types(uc); diff --git a/samples/Makefile b/samples/Makefile index 2f347361..4724f17b 100644 --- a/samples/Makefile +++ b/samples/Makefile @@ -64,6 +64,7 @@ UNICORN_ARCHS := $(shell if [ -e ../config.log ]; then cat ../config.log;\ SOURCES = ifneq (,$(findstring arm,$(UNICORN_ARCHS))) SOURCES += sample_arm.c +SOURCES += sample_armeb.c endif ifneq (,$(findstring aarch64,$(UNICORN_ARCHS))) SOURCES += sample_arm64.c diff --git a/uc.c b/uc.c index eabf7cb3..cc91b1ef 100644 --- a/uc.c +++ b/uc.c @@ -188,12 +188,15 @@ uc_err uc_open(uc_arch arch, uc_mode mode, uc_engine **result) #endif #ifdef UNICORN_HAS_ARM case UC_ARCH_ARM: - if ((mode & ~UC_MODE_ARM_MASK) || - (mode & UC_MODE_BIG_ENDIAN)) { + if ((mode & ~UC_MODE_ARM_MASK)) { free(uc); return UC_ERR_MODE; } - uc->init_arch = arm_uc_init; + if (mode & UC_MODE_BIG_ENDIAN) { + uc->init_arch = armeb_uc_init; + } else { + uc->init_arch = arm_uc_init; + } if (mode & UC_MODE_THUMB) uc->thumb = 1; From d2740b17ce7d930dbb41d8b2d10956b0d6c80e78 Mon Sep 17 00:00:00 2001 From: zhangwm Date: Mon, 13 Mar 2017 23:19:09 +0800 Subject: [PATCH 05/11] armeb: add C sample for armeb. --- bindings/python/sample_armeb.py | 3 +- samples/sample_armeb.c | 176 ++++++++++++++++++++++++++++++++ 2 files changed, 177 insertions(+), 2 deletions(-) create mode 100644 samples/sample_armeb.c diff --git a/bindings/python/sample_armeb.py b/bindings/python/sample_armeb.py index 97848830..37b4d6a5 100755 --- a/bindings/python/sample_armeb.py +++ b/bindings/python/sample_armeb.py @@ -1,6 +1,5 @@ #!/usr/bin/env python -# Sample code for ARM of Unicorn. Nguyen Anh Quynh -# Python sample ported by Loi Anh Tuan +# Sample code for ARM big endian of Unicorn. zhangwm from __future__ import print_function from unicorn import * diff --git a/samples/sample_armeb.c b/samples/sample_armeb.c new file mode 100644 index 00000000..e59ce8b8 --- /dev/null +++ b/samples/sample_armeb.c @@ -0,0 +1,176 @@ +/* Unicorn Emulator Engine */ +/* By zhangwm, 2017 */ + +/* Sample code to demonstrate how to emulate ARM code */ + +// windows specific +#ifdef _MSC_VER +#include +#include +#define PRIx64 "llX" +#ifdef DYNLOAD +#include "unicorn_dynload.h" +#else // DYNLOAD +#include +#ifdef _WIN64 +#pragma comment(lib, "unicorn_staload64.lib") +#else // _WIN64 +#pragma comment(lib, "unicorn_staload.lib") +#endif // _WIN64 +#endif // DYNLOAD + +// posix specific +#else // _MSC_VER +#include +#include +#include +#endif // _MSC_VER + + +// code to be emulated +#define ARM_CODE "\xe3\xa0\x00\x37\xe0\x42\x10\x03" // mov r0, #0x37; sub r1, r2, r3 +#define THUMB_CODE "\xb0\x83" // sub sp, #0xc + +// memory address where emulation starts +#define ADDRESS 0x10000 + +static void hook_block(uc_engine *uc, uint64_t address, uint32_t size, void *user_data) +{ + printf(">>> Tracing basic block at 0x%"PRIx64 ", block size = 0x%x\n", address, size); +} + +static void hook_code(uc_engine *uc, uint64_t address, uint32_t size, void *user_data) +{ + printf(">>> Tracing instruction at 0x%"PRIx64 ", instruction size = 0x%x\n", address, size); +} + +static void test_arm(void) +{ + uc_engine *uc; + uc_err err; + uc_hook trace1, trace2; + + int r0 = 0x1234; // R0 register + int r2 = 0x6789; // R1 register + int r3 = 0x3333; // R2 register + int r1; // R1 register + + printf("Emulate ARM code\n"); + + // Initialize emulator in ARM mode + err = uc_open(UC_ARCH_ARM, UC_MODE_ARM + UC_MODE_BIG_ENDIAN, &uc); + if (err) { + printf("Failed on uc_open() with error returned: %u (%s)\n", + err, uc_strerror(err)); + return; + } + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + uc_mem_write(uc, ADDRESS, ARM_CODE, sizeof(ARM_CODE) - 1); + + // initialize machine registers + uc_reg_write(uc, UC_ARM_REG_R0, &r0); + uc_reg_write(uc, UC_ARM_REG_R2, &r2); + uc_reg_write(uc, UC_ARM_REG_R3, &r3); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, &trace1, UC_HOOK_BLOCK, hook_block, NULL, 1, 0); + + // tracing one instruction at ADDRESS with customized callback + uc_hook_add(uc, &trace2, UC_HOOK_CODE, hook_code, NULL, ADDRESS, ADDRESS); + + // emulate machine code in infinite time (last param = 0), or when + // finishing all the code. + err = uc_emu_start(uc, ADDRESS, ADDRESS + sizeof(ARM_CODE) -1, 0, 0); + if (err) { + printf("Failed on uc_emu_start() with error returned: %u\n", err); + } + + // now print out some registers + printf(">>> Emulation done. Below is the CPU context\n"); + + uc_reg_read(uc, UC_ARM_REG_R0, &r0); + uc_reg_read(uc, UC_ARM_REG_R1, &r1); + printf(">>> R0 = 0x%x\n", r0); + printf(">>> R1 = 0x%x\n", r1); + + uc_close(uc); +} + +static void test_thumb(void) +{ + uc_engine *uc; + uc_err err; + uc_hook trace1, trace2; + + int sp = 0x1234; // R0 register + + printf("Emulate THUMB code\n"); + + // Initialize emulator in ARM mode + err = uc_open(UC_ARCH_ARM, UC_MODE_THUMB + UC_MODE_BIG_ENDIAN, &uc); + if (err) { + printf("Failed on uc_open() with error returned: %u (%s)\n", + err, uc_strerror(err)); + return; + } + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + uc_mem_write(uc, ADDRESS, THUMB_CODE, sizeof(THUMB_CODE) - 1); + + // initialize machine registers + uc_reg_write(uc, UC_ARM_REG_SP, &sp); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, &trace1, UC_HOOK_BLOCK, hook_block, NULL, 1, 0); + + // tracing one instruction at ADDRESS with customized callback + uc_hook_add(uc, &trace2, UC_HOOK_CODE, hook_code, NULL, ADDRESS, ADDRESS); + + // emulate machine code in infinite time (last param = 0), or when + // finishing all the code. + // Note we start at ADDRESS | 1 to indicate THUMB mode. + err = uc_emu_start(uc, ADDRESS | 1, ADDRESS + sizeof(THUMB_CODE) -1, 0, 0); + if (err) { + printf("Failed on uc_emu_start() with error returned: %u\n", err); + } + + // now print out some registers + printf(">>> Emulation done. Below is the CPU context\n"); + + uc_reg_read(uc, UC_ARM_REG_SP, &sp); + printf(">>> SP = 0x%x\n", sp); + + uc_close(uc); +} + +int main(int argc, char **argv, char **envp) +{ + // dynamically load shared library +#ifdef DYNLOAD + if (!uc_dyn_load(NULL, 0)) { + printf("Error dynamically loading shared library.\n"); + printf("Please check that unicorn.dll/unicorn.so is available as well as\n"); + printf("any other dependent dll/so files.\n"); + printf("The easiest way is to place them in the same directory as this app.\n"); + return 1; + } +#endif + + test_arm(); + printf("==========================\n"); + test_thumb(); + + // dynamically free shared library +#ifdef DYNLOAD + uc_dyn_free(); +#endif + + return 0; +} From a267af7d95f86bfe6794dac5112d350b9ec625c3 Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Tue, 14 Mar 2017 23:41:31 +0800 Subject: [PATCH 06/11] add arm_release to qemu/header_gen.py, and regenerate qemu/armeb.h --- qemu/aarch64.h | 1 + qemu/arm.h | 1 + qemu/armeb.h | 146 ++++++++++++++++++++++----------------------- qemu/header_gen.py | 1 + qemu/m68k.h | 1 + qemu/mips.h | 1 + qemu/mips64.h | 1 + qemu/mips64el.h | 1 + qemu/mipsel.h | 1 + qemu/powerpc.h | 1 + qemu/sparc.h | 1 + qemu/sparc64.h | 1 + qemu/x86_64.h | 1 + 13 files changed, 85 insertions(+), 73 deletions(-) diff --git a/qemu/aarch64.h b/qemu/aarch64.h index 7a7a5ea7..04c3715a 100644 --- a/qemu/aarch64.h +++ b/qemu/aarch64.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_AARCH64_H #define UNICORN_AUTOGEN_AARCH64_H +#define arm_release arm_release_aarch64 #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_aarch64 #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_aarch64 #define use_idiv_instructions_rt use_idiv_instructions_rt_aarch64 diff --git a/qemu/arm.h b/qemu/arm.h index 80225bdd..5dcea42b 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_ARM_H #define UNICORN_AUTOGEN_ARM_H +#define arm_release arm_release_arm #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_arm #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_arm #define use_idiv_instructions_rt use_idiv_instructions_rt_arm diff --git a/qemu/armeb.h b/qemu/armeb.h index 2c846ce6..3cfc4338 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ -#ifndef UNICORN_AUTOGEN_ARM_H -#define UNICORN_AUTOGEN_ARM_H +#ifndef UNICORN_AUTOGEN_ARMEB_H +#define UNICORN_AUTOGEN_ARMEB_H +#define arm_release arm_release_armeb #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_armeb #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_armeb #define use_idiv_instructions_rt use_idiv_instructions_rt_armeb @@ -84,67 +85,67 @@ #define alloc_code_gen_buffer alloc_code_gen_buffer_armeb #define alloc_entry alloc_entry_armeb #define always_true always_true_armeb -#define armeb1026_initfn armeb1026_initfn_armeb -#define armeb1136_initfn armeb1136_initfn_armeb -#define armeb1136_r2_initfn armeb1136_r2_initfn_armeb -#define armeb1176_initfn armeb1176_initfn_armeb -#define armeb11mpcore_initfn armeb11mpcore_initfn_armeb -#define armeb926_initfn armeb926_initfn_armeb -#define armeb946_initfn armeb946_initfn_armeb -#define armeb_ccnt_enabled armeb_ccnt_enabled_armeb -#define armeb_cp_read_zero armeb_cp_read_zero_armeb -#define armeb_cp_reset_ignore armeb_cp_reset_ignore_armeb -#define armeb_cpu_do_interrupt armeb_cpu_do_interrupt_armeb -#define armeb_cpu_exec_interrupt armeb_cpu_exec_interrupt_armeb -#define armeb_cpu_finalizefn armeb_cpu_finalizefn_armeb -#define armeb_cpu_get_phys_page_debug armeb_cpu_get_phys_page_debug_armeb -#define armeb_cpu_handle_mmu_fault armeb_cpu_handle_mmu_fault_armeb -#define armeb_cpu_initfn armeb_cpu_initfn_armeb -#define armeb_cpu_list armeb_cpu_list_armeb +#define arm1026_initfn arm1026_initfn_armeb +#define arm1136_initfn arm1136_initfn_armeb +#define arm1136_r2_initfn arm1136_r2_initfn_armeb +#define arm1176_initfn arm1176_initfn_armeb +#define arm11mpcore_initfn arm11mpcore_initfn_armeb +#define arm926_initfn arm926_initfn_armeb +#define arm946_initfn arm946_initfn_armeb +#define arm_ccnt_enabled arm_ccnt_enabled_armeb +#define arm_cp_read_zero arm_cp_read_zero_armeb +#define arm_cp_reset_ignore arm_cp_reset_ignore_armeb +#define arm_cpu_do_interrupt arm_cpu_do_interrupt_armeb +#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_armeb +#define arm_cpu_finalizefn arm_cpu_finalizefn_armeb +#define arm_cpu_get_phys_page_debug arm_cpu_get_phys_page_debug_armeb +#define arm_cpu_handle_mmu_fault arm_cpu_handle_mmu_fault_armeb +#define arm_cpu_initfn arm_cpu_initfn_armeb +#define arm_cpu_list arm_cpu_list_armeb #define cpu_loop_exit cpu_loop_exit_armeb -#define armeb_cpu_post_init armeb_cpu_post_init_armeb -#define armeb_cpu_realizefn armeb_cpu_realizefn_armeb -#define armeb_cpu_register_gdb_regs_for_features armeb_cpu_register_gdb_regs_for_features_armeb -#define armeb_cpu_register_types armeb_cpu_register_types_armeb +#define arm_cpu_post_init arm_cpu_post_init_armeb +#define arm_cpu_realizefn arm_cpu_realizefn_armeb +#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_armeb +#define arm_cpu_register_types arm_cpu_register_types_armeb #define cpu_resume_from_signal cpu_resume_from_signal_armeb -#define armeb_cpus armeb_cpus_armeb -#define armeb_cpu_set_pc armeb_cpu_set_pc_armeb -#define armeb_cp_write_ignore armeb_cp_write_ignore_armeb -#define armeb_current_el armeb_current_el_armeb -#define armeb_dc_feature armeb_dc_feature_armeb -#define armeb_debug_excp_handler armeb_debug_excp_handler_armeb -#define armeb_debug_target_el armeb_debug_target_el_armeb -#define armeb_el_is_aa64 armeb_el_is_aa64_armeb -#define armeb_env_get_cpu armeb_env_get_cpu_armeb -#define armeb_excp_target_el armeb_excp_target_el_armeb -#define armeb_excp_unmasked armeb_excp_unmasked_armeb -#define armeb_feature armeb_feature_armeb -#define armeb_generate_debug_exceptions armeb_generate_debug_exceptions_armeb +#define arm_cpus arm_cpus_armeb +#define arm_cpu_set_pc arm_cpu_set_pc_armeb +#define arm_cp_write_ignore arm_cp_write_ignore_armeb +#define arm_current_el arm_current_el_armeb +#define arm_dc_feature arm_dc_feature_armeb +#define arm_debug_excp_handler arm_debug_excp_handler_armeb +#define arm_debug_target_el arm_debug_target_el_armeb +#define arm_el_is_aa64 arm_el_is_aa64_armeb +#define arm_env_get_cpu arm_env_get_cpu_armeb +#define arm_excp_target_el arm_excp_target_el_armeb +#define arm_excp_unmasked arm_excp_unmasked_armeb +#define arm_feature arm_feature_armeb +#define arm_generate_debug_exceptions arm_generate_debug_exceptions_armeb #define gen_intermediate_code gen_intermediate_code_armeb #define gen_intermediate_code_pc gen_intermediate_code_pc_armeb -#define armeb_gen_test_cc armeb_gen_test_cc_armeb -#define armeb_gt_ptimer_cb armeb_gt_ptimer_cb_armeb -#define armeb_gt_vtimer_cb armeb_gt_vtimer_cb_armeb -#define armeb_handle_psci_call armeb_handle_psci_call_armeb -#define armeb_is_psci_call armeb_is_psci_call_armeb -#define armeb_is_secure armeb_is_secure_armeb -#define armeb_is_secure_below_el3 armeb_is_secure_below_el3_armeb -#define armeb_ldl_code armeb_ldl_code_armeb -#define armeb_lduw_code armeb_lduw_code_armeb -#define armeb_log_exception armeb_log_exception_armeb -#define armeb_reg_read armeb_reg_read_armeb -#define armeb_reg_reset armeb_reg_reset_armeb -#define armeb_reg_write armeb_reg_write_armeb +#define arm_gen_test_cc arm_gen_test_cc_armeb +#define arm_gt_ptimer_cb arm_gt_ptimer_cb_armeb +#define arm_gt_vtimer_cb arm_gt_vtimer_cb_armeb +#define arm_handle_psci_call arm_handle_psci_call_armeb +#define arm_is_psci_call arm_is_psci_call_armeb +#define arm_is_secure arm_is_secure_armeb +#define arm_is_secure_below_el3 arm_is_secure_below_el3_armeb +#define arm_ldl_code arm_ldl_code_armeb +#define arm_lduw_code arm_lduw_code_armeb +#define arm_log_exception arm_log_exception_armeb +#define arm_reg_read arm_reg_read_armeb +#define arm_reg_reset arm_reg_reset_armeb +#define arm_reg_write arm_reg_write_armeb #define restore_state_to_opc restore_state_to_opc_armeb -#define armeb_rmode_to_sf armeb_rmode_to_sf_armeb -#define armeb_singlestep_active armeb_singlestep_active_armeb +#define arm_rmode_to_sf arm_rmode_to_sf_armeb +#define arm_singlestep_active arm_singlestep_active_armeb #define tlb_fill tlb_fill_armeb #define tlb_flush tlb_flush_armeb #define tlb_flush_page tlb_flush_page_armeb #define tlb_set_page tlb_set_page_armeb -#define armeb_translate_init armeb_translate_init_armeb -#define armeb_v7m_class_init armeb_v7m_class_init_armeb -#define armeb_v7m_cpu_do_interrupt armeb_v7m_cpu_do_interrupt_armeb +#define arm_translate_init arm_translate_init_armeb +#define arm_v7m_class_init arm_v7m_class_init_armeb +#define arm_v7m_cpu_do_interrupt arm_v7m_cpu_do_interrupt_armeb #define ats_access ats_access_armeb #define ats_write ats_write_armeb #define bad_mode_switch bad_mode_switch_armeb @@ -210,9 +211,9 @@ #define cpsr_write cpsr_write_armeb #define cptype_valid cptype_valid_armeb #define cpu_abort cpu_abort_armeb -#define cpu_armeb_exec cpu_armeb_exec_armeb -#define cpu_armeb_gen_code cpu_armeb_gen_code_armeb -#define cpu_armeb_init cpu_armeb_init_armeb +#define cpu_arm_exec cpu_arm_exec_armeb +#define cpu_arm_gen_code cpu_arm_gen_code_armeb +#define cpu_arm_init cpu_arm_init_armeb #define cpu_breakpoint_insert cpu_breakpoint_insert_armeb #define cpu_breakpoint_remove cpu_breakpoint_remove_armeb #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_armeb @@ -302,11 +303,11 @@ #define debug_cp_reginfo debug_cp_reginfo_armeb #define debug_frame debug_frame_armeb #define debug_lpae_cp_reginfo debug_lpae_cp_reginfo_armeb -#define define_armeb_cp_regs define_armeb_cp_regs_armeb -#define define_armeb_cp_regs_with_opaque define_armeb_cp_regs_with_opaque_armeb +#define define_arm_cp_regs define_arm_cp_regs_armeb +#define define_arm_cp_regs_with_opaque define_arm_cp_regs_with_opaque_armeb #define define_debug_regs define_debug_regs_armeb -#define define_one_armeb_cp_reg define_one_armeb_cp_reg_armeb -#define define_one_armeb_cp_reg_with_opaque define_one_armeb_cp_reg_with_opaque_armeb +#define define_one_arm_cp_reg define_one_arm_cp_reg_armeb +#define define_one_arm_cp_reg_with_opaque define_one_arm_cp_reg_with_opaque_armeb #define deposit32 deposit32_armeb #define deposit64 deposit64_armeb #define deregister_tm_clones deregister_tm_clones_armeb @@ -319,7 +320,7 @@ #define device_reset device_reset_armeb #define device_set_realized device_set_realized_armeb #define device_type_info device_type_info_armeb -#define disas_armeb_insn disas_armeb_insn_armeb +#define disas_arm_insn disas_arm_insn_armeb #define disas_coproc_insn disas_coproc_insn_armeb #define disas_dsp_insn disas_dsp_insn_armeb #define disas_iwmmxt_insn disas_iwmmxt_insn_armeb @@ -329,7 +330,7 @@ #define disas_thumb_insn disas_thumb_insn_armeb #define disas_vfp_insn disas_vfp_insn_armeb #define disas_vfp_v8_insn disas_vfp_v8_insn_armeb -#define do_armeb_semihosting do_armeb_semihosting_armeb +#define do_arm_semihosting do_arm_semihosting_armeb #define do_clz16 do_clz16_armeb #define do_clz8 do_clz8_armeb #define do_constant_folding do_constant_folding_armeb @@ -618,9 +619,9 @@ #define gen_addq gen_addq_armeb #define gen_addq_lo gen_addq_lo_armeb #define gen_addq_msw gen_addq_msw_armeb -#define gen_armeb_parallel_addsub gen_armeb_parallel_addsub_armeb -#define gen_armeb_shift_im gen_armeb_shift_im_armeb -#define gen_armeb_shift_reg gen_armeb_shift_reg_armeb +#define gen_arm_parallel_addsub gen_arm_parallel_addsub_armeb +#define gen_arm_shift_im gen_arm_shift_im_armeb +#define gen_arm_shift_reg gen_arm_shift_reg_armeb #define gen_bx gen_bx_armeb #define gen_bx_im gen_bx_im_armeb #define gen_clrex gen_clrex_armeb @@ -638,10 +639,10 @@ #define gen_helper_clear_pstate_ss gen_helper_clear_pstate_ss_armeb #define gen_helper_clz32 gen_helper_clz32_armeb #define gen_helper_clz64 gen_helper_clz64_armeb -#define gen_helper_clz_armeb gen_helper_clz_armeb_armeb +#define gen_helper_clz_arm gen_helper_clz_arm_armeb #define gen_helper_cpsr_read gen_helper_cpsr_read_armeb #define gen_helper_cpsr_write gen_helper_cpsr_write_armeb -#define gen_helper_crc32_armeb gen_helper_crc32_armeb_armeb +#define gen_helper_crc32_arm gen_helper_crc32_arm_armeb #define gen_helper_crc32c gen_helper_crc32c_armeb #define gen_helper_crypto_aese gen_helper_crypto_aese_armeb #define gen_helper_crypto_aesmc gen_helper_crypto_aesmc_armeb @@ -1292,7 +1293,7 @@ #define gen_vfp_uhto gen_vfp_uhto_armeb #define gen_vfp_uito gen_vfp_uito_armeb #define gen_vfp_ulto gen_vfp_ulto_armeb -#define get_armeb_cp_reginfo get_armeb_cp_reginfo_armeb +#define get_arm_cp_reginfo get_arm_cp_reginfo_armeb #define get_clock get_clock_armeb #define get_clock_realtime get_clock_realtime_armeb #define get_constraint_priority get_constraint_priority_armeb @@ -1356,10 +1357,10 @@ #define helper_be_stq_mmu helper_be_stq_mmu_armeb #define helper_be_stw_mmu helper_be_stw_mmu_armeb #define helper_clear_pstate_ss helper_clear_pstate_ss_armeb -#define helper_clz_armeb helper_clz_armeb_armeb +#define helper_clz_arm helper_clz_arm_armeb #define helper_cpsr_read helper_cpsr_read_armeb #define helper_cpsr_write helper_cpsr_write_armeb -#define helper_crc32_armeb helper_crc32_armeb_armeb +#define helper_crc32_arm helper_crc32_arm_armeb #define helper_crc32c helper_crc32c_armeb #define helper_crypto_aese helper_crypto_aese_armeb #define helper_crypto_aesmc helper_crypto_aesmc_armeb @@ -2585,7 +2586,7 @@ #define string_input_get_visitor string_input_get_visitor_armeb #define string_input_visitor_cleanup string_input_visitor_cleanup_armeb #define string_input_visitor_new string_input_visitor_new_armeb -#define strongarmeb_cp_reginfo strongarmeb_cp_reginfo_armeb +#define strongarm_cp_reginfo strongarm_cp_reginfo_armeb #define strstart strstart_armeb #define strtosz strtosz_armeb #define strtosz_suffix strtosz_suffix_armeb @@ -3016,5 +3017,4 @@ #define xpsr_write xpsr_write_armeb #define xscale_cpar_write xscale_cpar_write_armeb #define xscale_cp_reginfo xscale_cp_reginfo_armeb -#define arm_release arm_release_armeb #endif diff --git a/qemu/header_gen.py b/qemu/header_gen.py index 047f6358..f4702e67 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -7,6 +7,7 @@ import sys symbols = ( + 'arm_release', 'aarch64_tb_set_jmp_target', 'ppc_tb_set_jmp_target', 'use_idiv_instructions_rt', diff --git a/qemu/m68k.h b/qemu/m68k.h index f40a8dc4..dffdf7e7 100644 --- a/qemu/m68k.h +++ b/qemu/m68k.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_M68K_H #define UNICORN_AUTOGEN_M68K_H +#define arm_release arm_release_m68k #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_m68k #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_m68k #define use_idiv_instructions_rt use_idiv_instructions_rt_m68k diff --git a/qemu/mips.h b/qemu/mips.h index 1b8e9e2b..99d0899d 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_MIPS_H #define UNICORN_AUTOGEN_MIPS_H +#define arm_release arm_release_mips #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_mips #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_mips #define use_idiv_instructions_rt use_idiv_instructions_rt_mips diff --git a/qemu/mips64.h b/qemu/mips64.h index 06b30666..139d9389 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_MIPS64_H #define UNICORN_AUTOGEN_MIPS64_H +#define arm_release arm_release_mips64 #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_mips64 #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_mips64 #define use_idiv_instructions_rt use_idiv_instructions_rt_mips64 diff --git a/qemu/mips64el.h b/qemu/mips64el.h index 87cc74c8..62289de5 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_MIPS64EL_H #define UNICORN_AUTOGEN_MIPS64EL_H +#define arm_release arm_release_mips64el #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_mips64el #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_mips64el #define use_idiv_instructions_rt use_idiv_instructions_rt_mips64el diff --git a/qemu/mipsel.h b/qemu/mipsel.h index a8a3fb4f..147bda28 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_MIPSEL_H #define UNICORN_AUTOGEN_MIPSEL_H +#define arm_release arm_release_mipsel #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_mipsel #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_mipsel #define use_idiv_instructions_rt use_idiv_instructions_rt_mipsel diff --git a/qemu/powerpc.h b/qemu/powerpc.h index fd831d98..998f1f3b 100644 --- a/qemu/powerpc.h +++ b/qemu/powerpc.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_POWERPC_H #define UNICORN_AUTOGEN_POWERPC_H +#define arm_release arm_release_powerpc #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_powerpc #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_powerpc #define use_idiv_instructions_rt use_idiv_instructions_rt_powerpc diff --git a/qemu/sparc.h b/qemu/sparc.h index fda21bf4..4fbf55e7 100644 --- a/qemu/sparc.h +++ b/qemu/sparc.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_SPARC_H #define UNICORN_AUTOGEN_SPARC_H +#define arm_release arm_release_sparc #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_sparc #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_sparc #define use_idiv_instructions_rt use_idiv_instructions_rt_sparc diff --git a/qemu/sparc64.h b/qemu/sparc64.h index aaafd634..f3895222 100644 --- a/qemu/sparc64.h +++ b/qemu/sparc64.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_SPARC64_H #define UNICORN_AUTOGEN_SPARC64_H +#define arm_release arm_release_sparc64 #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_sparc64 #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_sparc64 #define use_idiv_instructions_rt use_idiv_instructions_rt_sparc64 diff --git a/qemu/x86_64.h b/qemu/x86_64.h index 71025141..9b05becf 100644 --- a/qemu/x86_64.h +++ b/qemu/x86_64.h @@ -1,6 +1,7 @@ /* Autogen header for Unicorn Engine - DONOT MODIFY */ #ifndef UNICORN_AUTOGEN_X86_64_H #define UNICORN_AUTOGEN_X86_64_H +#define arm_release arm_release_x86_64 #define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_x86_64 #define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_x86_64 #define use_idiv_instructions_rt use_idiv_instructions_rt_x86_64 From f144870adb102d4dbb2a462586950205d9dca32c Mon Sep 17 00:00:00 2001 From: zhangwm Date: Wed, 15 Mar 2017 20:23:05 +0800 Subject: [PATCH 07/11] armeb: modify CREDITS.TXT. --- CREDITS.TXT | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CREDITS.TXT b/CREDITS.TXT index 018329df..b3b2768c 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -66,4 +66,4 @@ farmdve: Memory leaking fix Andrew Dutcher: uc_context_{save, restore} API. Stephen Groat: improved CI setup. David Zimmer: VB6 binding. - +zhangwm: ARM big endian. From 3cd77904af619f785d2d8e1891902b12860533c8 Mon Sep 17 00:00:00 2001 From: xizhizhang Date: Wed, 15 Mar 2017 21:01:26 +0800 Subject: [PATCH 08/11] armeb: modify CREDITS.TXT. (#781) --- CREDITS.TXT | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CREDITS.TXT b/CREDITS.TXT index 018329df..b3b2768c 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -66,4 +66,4 @@ farmdve: Memory leaking fix Andrew Dutcher: uc_context_{save, restore} API. Stephen Groat: improved CI setup. David Zimmer: VB6 binding. - +zhangwm: ARM big endian. From ccdb0ff5238912079575e2c94f44ab8161ce0980 Mon Sep 17 00:00:00 2001 From: zhangwm Date: Wed, 15 Mar 2017 22:25:35 +0800 Subject: [PATCH 09/11] armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. --- .gitignore | 1 + qemu/arm.h | 1 + qemu/armeb.h | 1 + qemu/gen_all_header.sh | 2 +- qemu/header_gen.py | 12 +++++++++++- qemu/mips.h | 2 ++ qemu/mips64.h | 2 ++ qemu/mips64el.h | 2 ++ qemu/mipsel.h | 2 ++ qemu/target-arm/unicorn.h | 3 ++- qemu/target-arm/unicorn_arm.c | 2 -- qemu/target-mips/unicorn.c | 3 --- qemu/target-mips/unicorn.h | 6 ++++-- uc.c | 17 +++++++++++++++-- 14 files changed, 44 insertions(+), 12 deletions(-) diff --git a/.gitignore b/.gitignore index 10d73b35..30240c01 100644 --- a/.gitignore +++ b/.gitignore @@ -15,6 +15,7 @@ qemu/config-all-devices.mak i386-softmmu/ arm-softmmu/ +armeb-softmmu/ aarch64-softmmu/ mips-softmmu/ mips64-softmmu/ diff --git a/qemu/arm.h b/qemu/arm.h index 5dcea42b..87d02032 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -3017,4 +3017,5 @@ #define xpsr_write xpsr_write_arm #define xscale_cpar_write xscale_cpar_write_arm #define xscale_cp_reginfo xscale_cp_reginfo_arm +#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_arm #endif diff --git a/qemu/armeb.h b/qemu/armeb.h index 3cfc4338..30b771b5 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -3017,4 +3017,5 @@ #define xpsr_write xpsr_write_armeb #define xscale_cpar_write xscale_cpar_write_armeb #define xscale_cp_reginfo xscale_cp_reginfo_armeb +#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_armeb #endif diff --git a/qemu/gen_all_header.sh b/qemu/gen_all_header.sh index 485d6360..3c627337 100755 --- a/qemu/gen_all_header.sh +++ b/qemu/gen_all_header.sh @@ -1,4 +1,4 @@ #!/bin/sh -for d in x86_64 arm m68k aarch64 mips mipsel mips64 mips64el sparc sparc64; do +for d in x86_64 arm armeb m68k aarch64 mips mipsel mips64 mips64el sparc sparc64; do python header_gen.py $d > $d.h done diff --git a/qemu/header_gen.py b/qemu/header_gen.py index f4702e67..b84af804 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -3025,6 +3025,10 @@ symbols = ( 'xscale_cp_reginfo' ) +arm_symbols = ( + 'ARM_REGS_STORAGE_SIZE', +) + mips_symbols = ( 'cpu_mips_exec', 'cpu_mips_get_random', @@ -3931,7 +3935,9 @@ mips_symbols = ( 'mips_reg_write', 'mips_tcg_init', 'mips_cpu_list', - 'mips_release' + 'mips_release', + 'MIPS64_REGS_STORAGE_SIZE', + 'MIPS_REGS_STORAGE_SIZE' ) sparc_symbols = ( @@ -4019,6 +4025,10 @@ if __name__ == '__main__': for s in symbols: print("#define %s %s_%s" %(s, s, arch)) + if 'arm' in arch: + for s in arm_symbols: + print("#define %s %s_%s" %(s, s, arch)) + if 'mips' in arch: for s in mips_symbols: print("#define %s %s_%s" %(s, s, arch)) diff --git a/qemu/mips.h b/qemu/mips.h index 99d0899d..36ad9a4d 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mips #define mips_cpu_list mips_cpu_list_mips #define mips_release mips_release_mips +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips #endif diff --git a/qemu/mips64.h b/qemu/mips64.h index 139d9389..e464d4b3 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mips64 #define mips_cpu_list mips_cpu_list_mips64 #define mips_release mips_release_mips64 +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips64 +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips64 #endif diff --git a/qemu/mips64el.h b/qemu/mips64el.h index 62289de5..afe0d47f 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mips64el #define mips_cpu_list mips_cpu_list_mips64el #define mips_release mips_release_mips64el +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mips64el +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mips64el #endif diff --git a/qemu/mipsel.h b/qemu/mipsel.h index 147bda28..a04123e7 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -3923,4 +3923,6 @@ #define mips_tcg_init mips_tcg_init_mipsel #define mips_cpu_list mips_cpu_list_mipsel #define mips_release mips_release_mipsel +#define MIPS64_REGS_STORAGE_SIZE MIPS64_REGS_STORAGE_SIZE_mipsel +#define MIPS_REGS_STORAGE_SIZE MIPS_REGS_STORAGE_SIZE_mipsel #endif diff --git a/qemu/target-arm/unicorn.h b/qemu/target-arm/unicorn.h index cb3b3bb1..4918c477 100644 --- a/qemu/target-arm/unicorn.h +++ b/qemu/target-arm/unicorn.h @@ -20,7 +20,8 @@ void armeb_uc_init(struct uc_struct* uc); __attribute__ ((visibility ("default"))) void arm64_uc_init(struct uc_struct* uc); -extern const int ARM_REGS_STORAGE_SIZE; +extern const int ARM_REGS_STORAGE_SIZE_arm; +extern const int ARM_REGS_STORAGE_SIZE_armeb; extern const int ARM64_REGS_STORAGE_SIZE; #endif diff --git a/qemu/target-arm/unicorn_arm.c b/qemu/target-arm/unicorn_arm.c index d84da0ed..ea5a2276 100644 --- a/qemu/target-arm/unicorn_arm.c +++ b/qemu/target-arm/unicorn_arm.c @@ -9,9 +9,7 @@ #include "unicorn_common.h" #include "uc_priv.h" -#ifndef TARGET_WORDS_BIGENDIAN const int ARM_REGS_STORAGE_SIZE = offsetof(CPUARMState, tlb_table); -#endif static void arm_set_pc(struct uc_struct *uc, uint64_t address) { diff --git a/qemu/target-mips/unicorn.c b/qemu/target-mips/unicorn.c index 71f43608..0aa63391 100644 --- a/qemu/target-mips/unicorn.c +++ b/qemu/target-mips/unicorn.c @@ -9,14 +9,11 @@ #include "unicorn_common.h" #include "uc_priv.h" -// prevent the lines from being compiled twice -#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_MIPS64 const int MIPS64_REGS_STORAGE_SIZE = offsetof(CPUMIPSState, tlb_table); #else // MIPS32 const int MIPS_REGS_STORAGE_SIZE = offsetof(CPUMIPSState, tlb_table); #endif -#endif #ifdef TARGET_MIPS64 typedef uint64_t mipsreg_t; diff --git a/qemu/target-mips/unicorn.h b/qemu/target-mips/unicorn.h index 53b5c32a..b1c6cac8 100644 --- a/qemu/target-mips/unicorn.h +++ b/qemu/target-mips/unicorn.h @@ -15,7 +15,9 @@ void mipsel_uc_init(struct uc_struct* uc); void mips64_uc_init(struct uc_struct* uc); void mips64el_uc_init(struct uc_struct* uc); -extern const int MIPS_REGS_STORAGE_SIZE; -extern const int MIPS64_REGS_STORAGE_SIZE; +extern const int MIPS_REGS_STORAGE_SIZE_mips; +extern const int MIPS_REGS_STORAGE_SIZE_mipsel; +extern const int MIPS64_REGS_STORAGE_SIZE_mips64; +extern const int MIPS64_REGS_STORAGE_SIZE_mips64el; #endif diff --git a/uc.c b/uc.c index cc91b1ef..a40ccd35 100644 --- a/uc.c +++ b/uc.c @@ -1168,13 +1168,26 @@ static size_t cpu_context_size(uc_arch arch, uc_mode mode) case UC_ARCH_X86: return X86_REGS_STORAGE_SIZE; #endif #ifdef UNICORN_HAS_ARM - case UC_ARCH_ARM: return ARM_REGS_STORAGE_SIZE; + case UC_ARCH_ARM: return mode & UC_MODE_BIG_ENDIAN ? ARM_REGS_STORAGE_SIZE_armeb : ARM_REGS_STORAGE_SIZE_arm; #endif #ifdef UNICORN_HAS_ARM64 case UC_ARCH_ARM64: return ARM64_REGS_STORAGE_SIZE; #endif #ifdef UNICORN_HAS_MIPS - case UC_ARCH_MIPS: return mode & UC_MODE_MIPS64 ? MIPS64_REGS_STORAGE_SIZE : MIPS_REGS_STORAGE_SIZE; + case UC_ARCH_MIPS: + if (mode & UC_MODE_MIPS64) { + if (mode & UC_MODE_BIG_ENDIAN) { + return MIPS64_REGS_STORAGE_SIZE_mips64; + } else { + return MIPS64_REGS_STORAGE_SIZE_mips64el; + } + } else { + if (mode & UC_MODE_BIG_ENDIAN) { + return MIPS_REGS_STORAGE_SIZE_mips; + } else { + return MIPS_REGS_STORAGE_SIZE_mipsel; + } + } #endif #ifdef UNICORN_HAS_SPARC case UC_ARCH_SPARC: return mode & UC_MODE_SPARC64 ? SPARC64_REGS_STORAGE_SIZE : SPARC_REGS_STORAGE_SIZE; From 1bef32fff600b4c7188447da36124398421e97b2 Mon Sep 17 00:00:00 2001 From: fG! Date: Sat, 18 Mar 2017 01:17:23 +0000 Subject: [PATCH 10/11] Fix huge memory leak on uc_mem_protect() (#787) A memory region is allocated inside split_region() that was only freed in error case but not on success case, leading to huge memory leak if the region size was significant. --- uc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/uc.c b/uc.c index a40ccd35..916ce497 100644 --- a/uc.c +++ b/uc.c @@ -856,6 +856,7 @@ static bool split_region(struct uc_struct *uc, MemoryRegion *mr, uint64_t addres goto error; } + free(backup); return true; error: From b9712f0a5d03b3a227e00a72c0f8cd29c33a5a8b Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Sat, 18 Mar 2017 16:30:44 +0800 Subject: [PATCH 11/11] add sample_armeb to sample_all.sh --- samples/sample_all.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/samples/sample_all.sh b/samples/sample_all.sh index 026e0107..e409dd8e 100755 --- a/samples/sample_all.sh +++ b/samples/sample_all.sh @@ -25,6 +25,7 @@ fi if test -e $DIR/sample_arm; then echo "==========================" $DIR/sample_arm + $DIR/sample_armeb fi if test -e $DIR/sample_arm64; then echo "=========================="