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@ -414,41 +414,25 @@ typedef enum uc_control_type {
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// Current mode.
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// Get: @args = (*int)
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UC_CTL_UC_MODE,
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#define uc_ctl_get_mode(uc, mode) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_MODE, 1), (mode))
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// Curent page size.
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// Set: @args = (int)
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// Get: @args = (*int)
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UC_CTL_UC_PAGE_SIZE,
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#define uc_ctl_get_page_size(uc, ptr) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_PAGE_SIZE, 1, (ptr))
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#define uc_ctl_set_page_size(uc, page_size) \
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uc_ctl(uc, UC_CTL_W(UC_CTL_UC_PAGE_SIZE, 1), (page_size))
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// Current arch.
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// Get: @args = (*int)
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UC_CTL_UC_ARCH,
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#define uc_ctl_get_arch(uc, arch) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_ARCH, 1), (arch))
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// Current timeout.
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// Get: @args = (*uint64_t)
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UC_CTL_UC_TIMEOUT,
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#define uc_ctl_get_timeout(uc, ptr) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_TIMEOUT, 1), (ptr))
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// The number of current exists.
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// Get: @args = (*size_t)
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UC_CTL_UC_EXITS_CNT,
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#define uc_ctl_get_exists_cnt(uc, ptr) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_EXITS_CNT, 1), (ptr))
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// Current exists.
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// Set: @args = (*uint64_t exists, size_t len)
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// @len = UC_CTL_UC_EXITS_CNT
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// Get: @args = (*uint64_t exists, size_t len)
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// @len = UC_CTL_UC_EXITS_CNT
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UC_CTL_UC_EXITS,
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#define uc_ctl_get_exists(uc, buffer, len) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_EXITS, 2), (buffer), (len))
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#define uc_ctl_set_exists(uc, buffer, len) \
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uc_ctl(uc, UC_CTL_W(UC_CTL_UC_EXITS, 2), (buffer), (len))
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// Set the cpu model of uc.
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// Note this option can only be set before any Unicorn
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@ -456,24 +440,42 @@ typedef enum uc_control_type {
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// Set: @args = (int)
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// Get: @args = (int)
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UC_CTL_CPU_MODEL,
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#define uc_ctl_get_cpu_model(uc, model) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_CPU_MODEL, 1), (model))
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#define uc_ctl_set_cpu_model(uc, model) \
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uc_ctl(uc, UC_CTL_W(UC_CTL_CPU_MODEL, 1), (model))
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// Remove TB cache at a specifc address.
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// Del: @args = (uint64_t)
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// Set: @args = (uint64_t)
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UC_CTL_CPU_CACHE,
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// Request the edge of two TBs.
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// Get: @args = (uint64_t, uint64_t, *uint64_t)
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UC_CTL_CPU_TB_EDGE
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} uc_control_type;
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#define uc_ctl_get_mode(uc, mode) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_MODE, 1), (mode))
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#define uc_ctl_get_page_size(uc, ptr) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_PAGE_SIZE, 1, (ptr))
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#define uc_ctl_set_page_size(uc, page_size) \
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uc_ctl(uc, UC_CTL_W(UC_CTL_UC_PAGE_SIZE, 1), (page_size))
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#define uc_ctl_get_arch(uc, arch) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_ARCH, 1), (arch))
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#define uc_ctl_get_timeout(uc, ptr) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_TIMEOUT, 1), (ptr))
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#define uc_ctl_get_exists_cnt(uc, ptr) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_EXITS_CNT, 1), (ptr))
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#define uc_ctl_get_exists(uc, buffer, len) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_UC_EXITS, 2), (buffer), (len))
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#define uc_ctl_set_exists(uc, buffer, len) \
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uc_ctl(uc, UC_CTL_W(UC_CTL_UC_EXITS, 2), (buffer), (len))
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#define uc_ctl_get_cpu_model(uc, model) \
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uc_ctl(uc, UC_CTL_R(UC_CTL_CPU_MODEL, 1), (model))
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#define uc_ctl_set_cpu_model(uc, model) \
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uc_ctl(uc, UC_CTL_W(UC_CTL_CPU_MODEL, 1), (model))
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#define uc_ctl_del_cache(uc, address) \
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uc_ctl(uc, UC_CTL_N(UC_CTL_REMOTE_CACHE, 1), (address))
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#define uc_ctl_set_cache(uc, address) \
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uc_ctl(uc, UC_CTL_W(UC_CTL_REMOTE_CACHE, 1), (address))
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// Request the edge of two TBs.
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// Get: @args = (uint64_t, uint64_t, *uint64_t)
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UC_CTL_CPU_TB_EDGE
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#define uc_ctl_get_edge(uc, addr1, addr2, ptr) \
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uc_ctl(uc, UC_CTL_RW(UC_CTL_CPU_TB_EDGE, 3), (address))
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} uc_control_type;
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// Opaque storage for CPU context, used with uc_context_*()
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struct uc_context;
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