Added cache flush after code patching in unit tests for arm64 and riscv

This commit is contained in:
Quentin DUCASSE 2021-12-17 14:55:08 +01:00
parent 549274f44c
commit 033e79abac
2 changed files with 4 additions and 0 deletions

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@ -78,6 +78,7 @@ static void test_arm64_code_patching() {
OK(uc_close(uc)); OK(uc_close(uc));
} }
// Need to flush the cache before running the emulation after patching
static void test_arm64_code_patching_count() { static void test_arm64_code_patching_count() {
uc_engine *uc; uc_engine *uc;
char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1 char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
@ -93,6 +94,7 @@ static void test_arm64_code_patching_count() {
// patch instruction // patch instruction
char patch_code[] = "\x00\xfc\x1f\x11"; // add w0, w0, 0x7FF char patch_code[] = "\x00\xfc\x1f\x11"; // add w0, w0, 0x7FF
OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1)); OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
OK(uc_ctl_remove_cache(uc, code_start, code_start + sizeof(patch_code) - 1));
// zero out x0 // zero out x0
r_x0 = 0x0; r_x0 = 0x0;
OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0)); OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));

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@ -399,6 +399,7 @@ static void test_riscv64_code_patching() {
OK(uc_close(uc)); OK(uc_close(uc));
} }
// Need to flush the cache before running the emulation after patching
static void test_riscv64_code_patching_count() { static void test_riscv64_code_patching_count() {
uc_engine *uc; uc_engine *uc;
char code[] = "\x93\x82\x12\x00"; // addi t0, t0, 0x1 char code[] = "\x93\x82\x12\x00"; // addi t0, t0, 0x1
@ -414,6 +415,7 @@ static void test_riscv64_code_patching_count() {
// patch instruction // patch instruction
char patch_code[] = "\x93\x82\xf2\x7f"; // addi t0, t0, 0x7FF char patch_code[] = "\x93\x82\xf2\x7f"; // addi t0, t0, 0x7FF
OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1)); OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
OK(uc_ctl_remove_cache(uc, code_start, code_start + sizeof(patch_code) - 1));
// zero out t0 // zero out t0
r_t0 = 0x0; r_t0 = 0x0;
OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0)); OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0));