26 lines
476 B
C
26 lines
476 B
C
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/*
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* MIPS cpu parameters for qemu.
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*
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* SPDX-License-Identifier: LGPL-2.0+
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*/
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#ifndef MIPS_CPU_PARAM_H
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#define MIPS_CPU_PARAM_H 1
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#ifdef TARGET_MIPS64
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# define TARGET_LONG_BITS 64
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#else
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# define TARGET_LONG_BITS 32
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#endif
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#ifdef TARGET_MIPS64
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#define TARGET_PHYS_ADDR_SPACE_BITS 48
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#define TARGET_VIRT_ADDR_SPACE_BITS 48
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#else
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#define TARGET_PHYS_ADDR_SPACE_BITS 40
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#endif
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#define TARGET_PAGE_BITS 12
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#define NB_MMU_MODES 4
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#endif
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