1142 lines
47 KiB
C
1142 lines
47 KiB
C
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/* This file is autogenerated by scripts/decodetree.py. */
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typedef struct {
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int F;
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int I;
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int im;
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} arg_disas_t1616;
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typedef struct {
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int cond_mask;
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} arg_disas_t1617;
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typedef struct {
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int imm;
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int nz;
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int rn;
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} arg_disas_t1618;
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#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
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# pragma GCC diagnostic push
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# pragma GCC diagnostic ignored "-Wredundant-decls"
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# ifdef __clang__
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# pragma GCC diagnostic ignored "-Wtypedef-redefinition"
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# endif
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#endif
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typedef arg_s_rrr_shi arg_AND_rrri;
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static bool trans_AND_rrri(DisasContext *ctx, arg_AND_rrri *a);
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typedef arg_s_rrr_shi arg_EOR_rrri;
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static bool trans_EOR_rrri(DisasContext *ctx, arg_EOR_rrri *a);
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typedef arg_s_rrr_shr arg_MOV_rxrr;
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static bool trans_MOV_rxrr(DisasContext *ctx, arg_MOV_rxrr *a);
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typedef arg_s_rrr_shi arg_ADC_rrri;
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static bool trans_ADC_rrri(DisasContext *ctx, arg_ADC_rrri *a);
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typedef arg_s_rrr_shi arg_SBC_rrri;
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static bool trans_SBC_rrri(DisasContext *ctx, arg_SBC_rrri *a);
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typedef arg_s_rrr_shi arg_TST_xrri;
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static bool trans_TST_xrri(DisasContext *ctx, arg_TST_xrri *a);
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typedef arg_s_rri_rot arg_RSB_rri;
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static bool trans_RSB_rri(DisasContext *ctx, arg_RSB_rri *a);
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typedef arg_s_rrr_shi arg_CMP_xrri;
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static bool trans_CMP_xrri(DisasContext *ctx, arg_CMP_xrri *a);
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typedef arg_s_rrr_shi arg_CMN_xrri;
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static bool trans_CMN_xrri(DisasContext *ctx, arg_CMN_xrri *a);
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typedef arg_s_rrr_shi arg_ORR_rrri;
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static bool trans_ORR_rrri(DisasContext *ctx, arg_ORR_rrri *a);
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typedef arg_s_rrrr arg_MUL;
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static bool trans_MUL(DisasContext *ctx, arg_MUL *a);
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typedef arg_s_rrr_shi arg_BIC_rrri;
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static bool trans_BIC_rrri(DisasContext *ctx, arg_BIC_rrri *a);
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typedef arg_s_rrr_shi arg_MVN_rxri;
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static bool trans_MVN_rxri(DisasContext *ctx, arg_MVN_rxri *a);
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typedef arg_ldst_rr arg_STR_rr;
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static bool trans_STR_rr(DisasContext *ctx, arg_STR_rr *a);
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typedef arg_ldst_rr arg_STRH_rr;
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static bool trans_STRH_rr(DisasContext *ctx, arg_STRH_rr *a);
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typedef arg_ldst_rr arg_STRB_rr;
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static bool trans_STRB_rr(DisasContext *ctx, arg_STRB_rr *a);
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typedef arg_ldst_rr arg_LDRSB_rr;
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static bool trans_LDRSB_rr(DisasContext *ctx, arg_LDRSB_rr *a);
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typedef arg_ldst_rr arg_LDR_rr;
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static bool trans_LDR_rr(DisasContext *ctx, arg_LDR_rr *a);
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typedef arg_ldst_rr arg_LDRH_rr;
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static bool trans_LDRH_rr(DisasContext *ctx, arg_LDRH_rr *a);
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typedef arg_ldst_rr arg_LDRB_rr;
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static bool trans_LDRB_rr(DisasContext *ctx, arg_LDRB_rr *a);
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typedef arg_ldst_rr arg_LDRSH_rr;
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static bool trans_LDRSH_rr(DisasContext *ctx, arg_LDRSH_rr *a);
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typedef arg_ldst_ri arg_STR_ri;
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static bool trans_STR_ri(DisasContext *ctx, arg_STR_ri *a);
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typedef arg_ldst_ri arg_LDR_ri;
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static bool trans_LDR_ri(DisasContext *ctx, arg_LDR_ri *a);
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typedef arg_ldst_ri arg_STRB_ri;
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static bool trans_STRB_ri(DisasContext *ctx, arg_STRB_ri *a);
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typedef arg_ldst_ri arg_LDRB_ri;
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static bool trans_LDRB_ri(DisasContext *ctx, arg_LDRB_ri *a);
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typedef arg_ldst_ri arg_STRH_ri;
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static bool trans_STRH_ri(DisasContext *ctx, arg_STRH_ri *a);
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typedef arg_ldst_ri arg_LDRH_ri;
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static bool trans_LDRH_ri(DisasContext *ctx, arg_LDRH_ri *a);
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typedef arg_ri arg_ADR;
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static bool trans_ADR(DisasContext *ctx, arg_ADR *a);
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typedef arg_s_rri_rot arg_ADD_rri;
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static bool trans_ADD_rri(DisasContext *ctx, arg_ADD_rri *a);
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typedef arg_ldst_block arg_STM;
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static bool trans_STM(DisasContext *ctx, arg_STM *a);
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typedef arg_ldst_block arg_LDM_t16;
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static bool trans_LDM_t16(DisasContext *ctx, arg_LDM_t16 *a);
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typedef arg_s_rrr_shi arg_MOV_rxri;
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static bool trans_MOV_rxri(DisasContext *ctx, arg_MOV_rxri *a);
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typedef arg_s_rrr_shi arg_ADD_rrri;
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static bool trans_ADD_rrri(DisasContext *ctx, arg_ADD_rrri *a);
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typedef arg_s_rrr_shi arg_SUB_rrri;
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static bool trans_SUB_rrri(DisasContext *ctx, arg_SUB_rrri *a);
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typedef arg_s_rri_rot arg_SUB_rri;
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static bool trans_SUB_rri(DisasContext *ctx, arg_SUB_rri *a);
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typedef arg_s_rri_rot arg_MOV_rxi;
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static bool trans_MOV_rxi(DisasContext *ctx, arg_MOV_rxi *a);
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typedef arg_s_rri_rot arg_CMP_xri;
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static bool trans_CMP_xri(DisasContext *ctx, arg_CMP_xri *a);
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typedef arg_r arg_BX;
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static bool trans_BX(DisasContext *ctx, arg_BX *a);
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typedef arg_r arg_BLX_r;
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static bool trans_BLX_r(DisasContext *ctx, arg_BLX_r *a);
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typedef arg_r arg_BXNS;
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static bool trans_BXNS(DisasContext *ctx, arg_BXNS *a);
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typedef arg_r arg_BLXNS;
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static bool trans_BLXNS(DisasContext *ctx, arg_BLXNS *a);
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typedef arg_rrr_rot arg_SXTAH;
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static bool trans_SXTAH(DisasContext *ctx, arg_SXTAH *a);
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typedef arg_rrr_rot arg_SXTAB;
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static bool trans_SXTAB(DisasContext *ctx, arg_SXTAB *a);
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typedef arg_rrr_rot arg_UXTAH;
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static bool trans_UXTAH(DisasContext *ctx, arg_UXTAH *a);
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typedef arg_rrr_rot arg_UXTAB;
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static bool trans_UXTAB(DisasContext *ctx, arg_UXTAB *a);
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typedef arg_setend arg_SETEND;
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static bool trans_SETEND(DisasContext *ctx, arg_SETEND *a);
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typedef arg_cps arg_CPS;
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static bool trans_CPS(DisasContext *ctx, arg_CPS *a);
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typedef arg_disas_t1616 arg_CPS_v7m;
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static bool trans_CPS_v7m(DisasContext *ctx, arg_CPS_v7m *a);
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typedef arg_rr arg_REV;
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static bool trans_REV(DisasContext *ctx, arg_REV *a);
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typedef arg_rr arg_REV16;
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static bool trans_REV16(DisasContext *ctx, arg_REV16 *a);
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typedef arg_rr arg_REVSH;
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static bool trans_REVSH(DisasContext *ctx, arg_REVSH *a);
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typedef arg_empty arg_YIELD;
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static bool trans_YIELD(DisasContext *ctx, arg_YIELD *a);
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typedef arg_empty arg_WFE;
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static bool trans_WFE(DisasContext *ctx, arg_WFE *a);
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typedef arg_empty arg_WFI;
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static bool trans_WFI(DisasContext *ctx, arg_WFI *a);
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typedef arg_empty arg_NOP;
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static bool trans_NOP(DisasContext *ctx, arg_NOP *a);
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typedef arg_disas_t1617 arg_IT;
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static bool trans_IT(DisasContext *ctx, arg_IT *a);
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typedef arg_i arg_HLT;
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static bool trans_HLT(DisasContext *ctx, arg_HLT *a);
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typedef arg_i arg_BKPT;
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static bool trans_BKPT(DisasContext *ctx, arg_BKPT *a);
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typedef arg_disas_t1618 arg_CBZ;
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static bool trans_CBZ(DisasContext *ctx, arg_CBZ *a);
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typedef arg_empty arg_UDF;
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static bool trans_UDF(DisasContext *ctx, arg_UDF *a);
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typedef arg_i arg_SVC;
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static bool trans_SVC(DisasContext *ctx, arg_SVC *a);
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typedef arg_ci arg_B_cond_thumb;
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static bool trans_B_cond_thumb(DisasContext *ctx, arg_B_cond_thumb *a);
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typedef arg_i arg_B;
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static bool trans_B(DisasContext *ctx, arg_B *a);
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typedef arg_i arg_BLX_suffix;
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static bool trans_BLX_suffix(DisasContext *ctx, arg_BLX_suffix *a);
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typedef arg_i arg_BL_BLX_prefix;
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static bool trans_BL_BLX_prefix(DisasContext *ctx, arg_BL_BLX_prefix *a);
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typedef arg_i arg_BL_suffix;
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static bool trans_BL_suffix(DisasContext *ctx, arg_BL_suffix *a);
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#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
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# pragma GCC diagnostic pop
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#endif
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static void disas_t16_extract_addsub_2h(DisasContext *ctx, arg_s_rrr_shi *a, uint16_t insn)
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{
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a->rm = extract32(insn, 3, 4);
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a->rd = deposit32(extract32(insn, 0, 3), 3, 29, extract32(insn, 7, 1));
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a->rn = deposit32(extract32(insn, 0, 3), 3, 29, extract32(insn, 7, 1));
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a->shim = 0;
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a->shty = 0;
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}
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static void disas_t16_extract_addsub_2i(DisasContext *ctx, arg_s_rri_rot *a, uint16_t insn)
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{
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a->imm = extract32(insn, 6, 3);
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a->rn = extract32(insn, 3, 3);
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a->rd = extract32(insn, 0, 3);
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a->s = t16_setflags(ctx);
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a->rot = 0;
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}
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static void disas_t16_extract_addsub_3(DisasContext *ctx, arg_s_rrr_shi *a, uint16_t insn)
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{
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a->rm = extract32(insn, 6, 3);
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a->rn = extract32(insn, 3, 3);
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a->rd = extract32(insn, 0, 3);
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a->s = t16_setflags(ctx);
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a->shim = 0;
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a->shty = 0;
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}
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static void disas_t16_extract_addsub_sp_i(DisasContext *ctx, arg_s_rri_rot *a, uint16_t insn)
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{
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a->s = 0;
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a->rd = 13;
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a->rn = 13;
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a->rot = 0;
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a->imm = times_4(ctx, extract32(insn, 0, 7));
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}
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static void disas_t16_extract_arith_1i(DisasContext *ctx, arg_s_rri_rot *a, uint16_t insn)
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{
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a->rd = extract32(insn, 8, 3);
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a->imm = extract32(insn, 0, 8);
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a->rot = 0;
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a->rn = extract32(insn, 8, 3);
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}
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static void disas_t16_extract_branchr(DisasContext *ctx, arg_r *a, uint16_t insn)
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{
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a->rm = extract32(insn, 3, 4);
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}
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static void disas_t16_extract_disas_t16_Fmt_10(DisasContext *ctx, arg_ri *a, uint16_t insn)
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{
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a->rd = extract32(insn, 8, 3);
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a->imm = times_4(ctx, extract32(insn, 0, 8));
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}
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static void disas_t16_extract_disas_t16_Fmt_11(DisasContext *ctx, arg_s_rri_rot *a, uint16_t insn)
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{
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a->rd = extract32(insn, 8, 3);
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a->rn = 13;
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a->s = 0;
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a->rot = 0;
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a->imm = times_4(ctx, extract32(insn, 0, 8));
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}
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static void disas_t16_extract_disas_t16_Fmt_21(DisasContext *ctx, arg_setend *a, uint16_t insn)
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{
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a->E = extract32(insn, 3, 1);
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}
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static void disas_t16_extract_disas_t16_Fmt_22(DisasContext *ctx, arg_cps *a, uint16_t insn)
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{
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a->A = extract32(insn, 2, 1);
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a->I = extract32(insn, 1, 1);
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a->F = extract32(insn, 0, 1);
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a->mode = 0;
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a->M = 0;
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a->imod = plus_2(ctx, extract32(insn, 4, 1));
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}
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static void disas_t16_extract_disas_t16_Fmt_23(DisasContext *ctx, arg_disas_t1616 *a, uint16_t insn)
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{
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a->im = extract32(insn, 4, 1);
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a->I = extract32(insn, 1, 1);
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a->F = extract32(insn, 0, 1);
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}
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static void disas_t16_extract_disas_t16_Fmt_25(DisasContext *ctx, arg_empty *a, uint16_t insn)
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{
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}
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static void disas_t16_extract_disas_t16_Fmt_26(DisasContext *ctx, arg_disas_t1617 *a, uint16_t insn)
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{
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a->cond_mask = extract32(insn, 0, 8);
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}
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static void disas_t16_extract_disas_t16_Fmt_27(DisasContext *ctx, arg_i *a, uint16_t insn)
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{
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a->imm = extract32(insn, 0, 6);
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}
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static void disas_t16_extract_disas_t16_Fmt_28(DisasContext *ctx, arg_i *a, uint16_t insn)
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{
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a->imm = extract32(insn, 0, 8);
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}
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static void disas_t16_extract_disas_t16_Fmt_29(DisasContext *ctx, arg_disas_t1618 *a, uint16_t insn)
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{
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a->nz = extract32(insn, 11, 1);
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a->rn = extract32(insn, 0, 3);
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a->imm = times_2(ctx, deposit32(extract32(insn, 3, 5), 5, 27, extract32(insn, 9, 1)));
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}
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static void disas_t16_extract_disas_t16_Fmt_3(DisasContext *ctx, arg_s_rri_rot *a, uint16_t insn)
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{
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a->rn = extract32(insn, 3, 3);
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a->rd = extract32(insn, 0, 3);
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a->s = t16_setflags(ctx);
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a->imm = 0;
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a->rot = 0;
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}
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static void disas_t16_extract_disas_t16_Fmt_30(DisasContext *ctx, arg_ldst_block *a, uint16_t insn)
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{
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a->i = 0;
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a->b = 1;
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a->u = 0;
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a->w = 1;
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a->rn = 13;
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|
|
a->list = t16_push_list(ctx, extract32(insn, 0, 9));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_disas_t16_Fmt_31(DisasContext *ctx, arg_ldst_block *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->i = 1;
|
||
|
|
a->b = 0;
|
||
|
|
a->u = 0;
|
||
|
|
a->w = 1;
|
||
|
|
a->rn = 13;
|
||
|
|
a->list = t16_pop_list(ctx, extract32(insn, 0, 9));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_disas_t16_Fmt_32(DisasContext *ctx, arg_ci *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->cond = extract32(insn, 8, 4);
|
||
|
|
a->imm = times_2(ctx, sextract32(insn, 0, 8));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_disas_t16_Fmt_33(DisasContext *ctx, arg_i *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->imm = times_2(ctx, sextract32(insn, 0, 11));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_disas_t16_Fmt_34(DisasContext *ctx, arg_i *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->imm = extract32(insn, 0, 11);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_disas_t16_Fmt_35(DisasContext *ctx, arg_i *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->imm = sextract32(insn, 0, 11);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_disas_t16_Fmt_4(DisasContext *ctx, arg_s_rrrr *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rn = extract32(insn, 3, 3);
|
||
|
|
a->rd = extract32(insn, 0, 3);
|
||
|
|
a->s = t16_setflags(ctx);
|
||
|
|
a->rm = extract32(insn, 0, 3);
|
||
|
|
a->ra = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_extend(DisasContext *ctx, arg_rrr_rot *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rm = extract32(insn, 3, 3);
|
||
|
|
a->rd = extract32(insn, 0, 3);
|
||
|
|
a->rn = 15;
|
||
|
|
a->rot = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_ldst_ri_1(DisasContext *ctx, arg_ldst_ri *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->imm = extract32(insn, 6, 5);
|
||
|
|
a->rn = extract32(insn, 3, 3);
|
||
|
|
a->rt = extract32(insn, 0, 3);
|
||
|
|
a->p = 1;
|
||
|
|
a->w = 0;
|
||
|
|
a->u = 1;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_ldst_ri_2(DisasContext *ctx, arg_ldst_ri *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rn = extract32(insn, 3, 3);
|
||
|
|
a->rt = extract32(insn, 0, 3);
|
||
|
|
a->p = 1;
|
||
|
|
a->w = 0;
|
||
|
|
a->u = 1;
|
||
|
|
a->imm = times_2(ctx, extract32(insn, 6, 5));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_ldst_ri_4(DisasContext *ctx, arg_ldst_ri *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rn = extract32(insn, 3, 3);
|
||
|
|
a->rt = extract32(insn, 0, 3);
|
||
|
|
a->p = 1;
|
||
|
|
a->w = 0;
|
||
|
|
a->u = 1;
|
||
|
|
a->imm = times_4(ctx, extract32(insn, 6, 5));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_ldst_rr(DisasContext *ctx, arg_ldst_rr *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rm = extract32(insn, 6, 3);
|
||
|
|
a->rn = extract32(insn, 3, 3);
|
||
|
|
a->rt = extract32(insn, 0, 3);
|
||
|
|
a->p = 1;
|
||
|
|
a->w = 0;
|
||
|
|
a->u = 1;
|
||
|
|
a->shimm = 0;
|
||
|
|
a->shtype = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_ldst_spec_i(DisasContext *ctx, arg_ldst_ri *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rt = extract32(insn, 8, 3);
|
||
|
|
a->p = 1;
|
||
|
|
a->w = 0;
|
||
|
|
a->u = 1;
|
||
|
|
a->imm = times_4(ctx, extract32(insn, 0, 8));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_ldstm(DisasContext *ctx, arg_ldst_block *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rn = extract32(insn, 8, 3);
|
||
|
|
a->list = extract32(insn, 0, 8);
|
||
|
|
a->i = 1;
|
||
|
|
a->b = 0;
|
||
|
|
a->u = 0;
|
||
|
|
a->w = 1;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_lll_noshr(DisasContext *ctx, arg_s_rrr_shi *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rm = extract32(insn, 3, 3);
|
||
|
|
a->rd = extract32(insn, 0, 3);
|
||
|
|
a->s = t16_setflags(ctx);
|
||
|
|
a->rn = extract32(insn, 0, 3);
|
||
|
|
a->shim = 0;
|
||
|
|
a->shty = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_lxl_shr(DisasContext *ctx, arg_s_rrr_shr *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rs = extract32(insn, 3, 3);
|
||
|
|
a->rd = extract32(insn, 0, 3);
|
||
|
|
a->s = t16_setflags(ctx);
|
||
|
|
a->rm = extract32(insn, 0, 3);
|
||
|
|
a->rn = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_rdm(DisasContext *ctx, arg_rr *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rm = extract32(insn, 3, 3);
|
||
|
|
a->rd = extract32(insn, 0, 3);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_shift_i(DisasContext *ctx, arg_s_rrr_shi *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->shim = extract32(insn, 6, 5);
|
||
|
|
a->rm = extract32(insn, 3, 3);
|
||
|
|
a->rd = extract32(insn, 0, 3);
|
||
|
|
a->s = t16_setflags(ctx);
|
||
|
|
a->rn = extract32(insn, 0, 3);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void disas_t16_extract_xll_noshr(DisasContext *ctx, arg_s_rrr_shi *a, uint16_t insn)
|
||
|
|
{
|
||
|
|
a->rm = extract32(insn, 3, 3);
|
||
|
|
a->rn = extract32(insn, 0, 3);
|
||
|
|
a->s = 1;
|
||
|
|
a->rd = 0;
|
||
|
|
a->shim = 0;
|
||
|
|
a->shty = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static bool disas_t16(DisasContext *ctx, uint16_t insn)
|
||
|
|
{
|
||
|
|
union {
|
||
|
|
arg_ci f_ci;
|
||
|
|
arg_cps f_cps;
|
||
|
|
arg_disas_t1616 f_disas_t1616;
|
||
|
|
arg_disas_t1617 f_disas_t1617;
|
||
|
|
arg_disas_t1618 f_disas_t1618;
|
||
|
|
arg_empty f_empty;
|
||
|
|
arg_i f_i;
|
||
|
|
arg_ldst_block f_ldst_block;
|
||
|
|
arg_ldst_ri f_ldst_ri;
|
||
|
|
arg_ldst_rr f_ldst_rr;
|
||
|
|
arg_r f_r;
|
||
|
|
arg_ri f_ri;
|
||
|
|
arg_rr f_rr;
|
||
|
|
arg_rrr_rot f_rrr_rot;
|
||
|
|
arg_s_rri_rot f_s_rri_rot;
|
||
|
|
arg_s_rrr_shi f_s_rrr_shi;
|
||
|
|
arg_s_rrr_shr f_s_rrr_shr;
|
||
|
|
arg_s_rrrr f_s_rrrr;
|
||
|
|
arg_setend f_setend;
|
||
|
|
} u;
|
||
|
|
|
||
|
|
switch ((insn >> 12) & 0xf) {
|
||
|
|
case 0x0:
|
||
|
|
/* 0000.... ........ */
|
||
|
|
disas_t16_extract_shift_i(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 00000... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:137 */
|
||
|
|
u.f_s_rrr_shi.shty = 0;
|
||
|
|
if (trans_MOV_rxri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 00001... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:138 */
|
||
|
|
u.f_s_rrr_shi.shty = 1;
|
||
|
|
if (trans_MOV_rxri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 0001.... ........ */
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 00010... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:139 */
|
||
|
|
disas_t16_extract_shift_i(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
u.f_s_rrr_shi.shty = 2;
|
||
|
|
if (trans_MOV_rxri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 00011... ........ */
|
||
|
|
switch ((insn >> 9) & 0x3) {
|
||
|
|
case 0x0:
|
||
|
|
/* 0001100. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:146 */
|
||
|
|
disas_t16_extract_addsub_3(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_ADD_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 0001101. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:147 */
|
||
|
|
disas_t16_extract_addsub_3(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_SUB_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 0001110. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:154 */
|
||
|
|
disas_t16_extract_addsub_2i(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
if (trans_ADD_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 0001111. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:155 */
|
||
|
|
disas_t16_extract_addsub_2i(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
if (trans_SUB_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 0010.... ........ */
|
||
|
|
disas_t16_extract_arith_1i(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 00100... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:163 */
|
||
|
|
u.f_s_rri_rot.s = t16_setflags(ctx);
|
||
|
|
if (trans_MOV_rxi(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 00101... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:164 */
|
||
|
|
u.f_s_rri_rot.s = 1;
|
||
|
|
if (trans_CMP_xri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 0011.... ........ */
|
||
|
|
disas_t16_extract_arith_1i(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 00110... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:165 */
|
||
|
|
u.f_s_rri_rot.s = t16_setflags(ctx);
|
||
|
|
if (trans_ADD_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 00111... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:166 */
|
||
|
|
u.f_s_rri_rot.s = t16_setflags(ctx);
|
||
|
|
if (trans_SUB_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x4:
|
||
|
|
/* 0100.... ........ */
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01000... ........ */
|
||
|
|
switch ((insn >> 8) & 0x7) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01000000 ........ */
|
||
|
|
switch ((insn >> 6) & 0x3) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01000000 00...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:53 */
|
||
|
|
disas_t16_extract_lll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_AND_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01000000 01...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:54 */
|
||
|
|
disas_t16_extract_lll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_EOR_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 01000000 10...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:55 */
|
||
|
|
disas_t16_extract_lxl_shr(ctx, &u.f_s_rrr_shr, insn);
|
||
|
|
u.f_s_rrr_shr.shty = 0;
|
||
|
|
if (trans_MOV_rxrr(ctx, &u.f_s_rrr_shr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 01000000 11...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:56 */
|
||
|
|
disas_t16_extract_lxl_shr(ctx, &u.f_s_rrr_shr, insn);
|
||
|
|
u.f_s_rrr_shr.shty = 1;
|
||
|
|
if (trans_MOV_rxrr(ctx, &u.f_s_rrr_shr)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01000001 ........ */
|
||
|
|
switch ((insn >> 6) & 0x3) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01000001 00...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:57 */
|
||
|
|
disas_t16_extract_lxl_shr(ctx, &u.f_s_rrr_shr, insn);
|
||
|
|
u.f_s_rrr_shr.shty = 2;
|
||
|
|
if (trans_MOV_rxrr(ctx, &u.f_s_rrr_shr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01000001 01...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:58 */
|
||
|
|
disas_t16_extract_lll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_ADC_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 01000001 10...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:59 */
|
||
|
|
disas_t16_extract_lll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_SBC_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 01000001 11...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:60 */
|
||
|
|
disas_t16_extract_lxl_shr(ctx, &u.f_s_rrr_shr, insn);
|
||
|
|
u.f_s_rrr_shr.shty = 3;
|
||
|
|
if (trans_MOV_rxrr(ctx, &u.f_s_rrr_shr)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 01000010 ........ */
|
||
|
|
switch ((insn >> 6) & 0x3) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01000010 00...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:61 */
|
||
|
|
disas_t16_extract_xll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_TST_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01000010 01...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:62 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_3(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
if (trans_RSB_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 01000010 10...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:63 */
|
||
|
|
disas_t16_extract_xll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_CMP_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 01000010 11...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:64 */
|
||
|
|
disas_t16_extract_xll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_CMN_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 01000011 ........ */
|
||
|
|
switch ((insn >> 6) & 0x3) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01000011 00...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:65 */
|
||
|
|
disas_t16_extract_lll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_ORR_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01000011 01...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:66 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_4(ctx, &u.f_s_rrrr, insn);
|
||
|
|
if (trans_MUL(ctx, &u.f_s_rrrr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 01000011 10...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:67 */
|
||
|
|
disas_t16_extract_lll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_BIC_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 01000011 11...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:68 */
|
||
|
|
disas_t16_extract_lll_noshr(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
if (trans_MVN_rxri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x4:
|
||
|
|
/* 01000100 ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:174 */
|
||
|
|
disas_t16_extract_addsub_2h(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
u.f_s_rrr_shi.s = 0;
|
||
|
|
if (trans_ADD_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x5:
|
||
|
|
/* 01000101 ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:175 */
|
||
|
|
disas_t16_extract_addsub_2h(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
u.f_s_rrr_shi.s = 1;
|
||
|
|
if (trans_CMP_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x6:
|
||
|
|
/* 01000110 ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:176 */
|
||
|
|
disas_t16_extract_addsub_2h(ctx, &u.f_s_rrr_shi, insn);
|
||
|
|
u.f_s_rrr_shi.s = 0;
|
||
|
|
if (trans_MOV_rxri(ctx, &u.f_s_rrr_shi)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x7:
|
||
|
|
/* 01000111 ........ */
|
||
|
|
disas_t16_extract_branchr(ctx, &u.f_r, insn);
|
||
|
|
switch (insn & 0x00000087) {
|
||
|
|
case 0x00000000:
|
||
|
|
/* 01000111 0....000 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:191 */
|
||
|
|
if (trans_BX(ctx, &u.f_r)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x00000004:
|
||
|
|
/* 01000111 0....100 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:193 */
|
||
|
|
if (trans_BXNS(ctx, &u.f_r)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x00000080:
|
||
|
|
/* 01000111 1....000 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:192 */
|
||
|
|
if (trans_BLX_r(ctx, &u.f_r)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x00000084:
|
||
|
|
/* 01000111 1....100 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:194 */
|
||
|
|
if (trans_BLXNS(ctx, &u.f_r)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01001... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:118 */
|
||
|
|
disas_t16_extract_ldst_spec_i(ctx, &u.f_ldst_ri, insn);
|
||
|
|
u.f_ldst_ri.rn = 15;
|
||
|
|
if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x5:
|
||
|
|
/* 0101.... ........ */
|
||
|
|
disas_t16_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
||
|
|
switch ((insn >> 9) & 0x7) {
|
||
|
|
case 0x0:
|
||
|
|
/* 0101000. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:75 */
|
||
|
|
if (trans_STR_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 0101001. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:76 */
|
||
|
|
if (trans_STRH_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x2:
|
||
|
|
/* 0101010. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:77 */
|
||
|
|
if (trans_STRB_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 0101011. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:78 */
|
||
|
|
if (trans_LDRSB_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x4:
|
||
|
|
/* 0101100. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:79 */
|
||
|
|
if (trans_LDR_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x5:
|
||
|
|
/* 0101101. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:80 */
|
||
|
|
if (trans_LDRH_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x6:
|
||
|
|
/* 0101110. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:81 */
|
||
|
|
if (trans_LDRB_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x7:
|
||
|
|
/* 0101111. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:82 */
|
||
|
|
if (trans_LDRSH_rr(ctx, &u.f_ldst_rr)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x6:
|
||
|
|
/* 0110.... ........ */
|
||
|
|
disas_t16_extract_ldst_ri_4(ctx, &u.f_ldst_ri, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01100... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:93 */
|
||
|
|
if (trans_STR_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01101... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:94 */
|
||
|
|
if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x7:
|
||
|
|
/* 0111.... ........ */
|
||
|
|
disas_t16_extract_ldst_ri_1(ctx, &u.f_ldst_ri, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 01110... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:95 */
|
||
|
|
if (trans_STRB_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 01111... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:96 */
|
||
|
|
if (trans_LDRB_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x8:
|
||
|
|
/* 1000.... ........ */
|
||
|
|
disas_t16_extract_ldst_ri_2(ctx, &u.f_ldst_ri, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10000... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:104 */
|
||
|
|
if (trans_STRH_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10001... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:105 */
|
||
|
|
if (trans_LDRH_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x9:
|
||
|
|
/* 1001.... ........ */
|
||
|
|
disas_t16_extract_ldst_spec_i(ctx, &u.f_ldst_ri, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10010... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:113 */
|
||
|
|
u.f_ldst_ri.rn = 13;
|
||
|
|
if (trans_STR_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10011... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:114 */
|
||
|
|
u.f_ldst_ri.rn = 13;
|
||
|
|
if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0xa:
|
||
|
|
/* 1010.... ........ */
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10100... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:122 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_10(ctx, &u.f_ri, insn);
|
||
|
|
if (trans_ADR(ctx, &u.f_ri)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10101... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:123 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_11(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
if (trans_ADD_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0xb:
|
||
|
|
/* 1011.... ........ */
|
||
|
|
switch ((insn >> 10) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 1011.0.. ........ */
|
||
|
|
switch ((insn >> 8) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 1011.0.0 ........ */
|
||
|
|
switch (insn & 0x00000a80) {
|
||
|
|
case 0x00000000:
|
||
|
|
/* 10110000 0....... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:184 */
|
||
|
|
disas_t16_extract_addsub_sp_i(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
if (trans_ADD_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x00000080:
|
||
|
|
/* 10110000 1....... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:185 */
|
||
|
|
disas_t16_extract_addsub_sp_i(ctx, &u.f_s_rri_rot, insn);
|
||
|
|
if (trans_SUB_rri(ctx, &u.f_s_rri_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x00000200:
|
||
|
|
/* 10110010 0....... */
|
||
|
|
disas_t16_extract_extend(ctx, &u.f_rrr_rot, insn);
|
||
|
|
switch ((insn >> 6) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10110010 00...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:200 */
|
||
|
|
if (trans_SXTAH(ctx, &u.f_rrr_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10110010 01...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:201 */
|
||
|
|
if (trans_SXTAB(ctx, &u.f_rrr_rot)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x00000280:
|
||
|
|
/* 10110010 1....... */
|
||
|
|
disas_t16_extract_extend(ctx, &u.f_rrr_rot, insn);
|
||
|
|
switch ((insn >> 6) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10110010 10...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:202 */
|
||
|
|
if (trans_UXTAH(ctx, &u.f_rrr_rot)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10110010 11...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:203 */
|
||
|
|
if (trans_UXTAB(ctx, &u.f_rrr_rot)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x00000a00:
|
||
|
|
/* 10111010 0....... */
|
||
|
|
disas_t16_extract_rdm(ctx, &u.f_rr, insn);
|
||
|
|
switch ((insn >> 6) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10111010 00...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:219 */
|
||
|
|
if (trans_REV(ctx, &u.f_rr)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10111010 01...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:220 */
|
||
|
|
if (trans_REV16(ctx, &u.f_rr)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x00000a80:
|
||
|
|
/* 10111010 1....... */
|
||
|
|
switch ((insn >> 6) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10111010 10...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:246 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_27(ctx, &u.f_i, insn);
|
||
|
|
if (trans_HLT(ctx, &u.f_i)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10111010 11...... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:221 */
|
||
|
|
disas_t16_extract_rdm(ctx, &u.f_rr, insn);
|
||
|
|
if (trans_REVSH(ctx, &u.f_rr)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 1011.0.1 ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:248 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_29(ctx, &u.f_disas_t1618, insn);
|
||
|
|
if (trans_CBZ(ctx, &u.f_disas_t1618)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 1011.1.. ........ */
|
||
|
|
switch (insn & 0x00000a00) {
|
||
|
|
case 0x00000000:
|
||
|
|
/* 1011010. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:255 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_30(ctx, &u.f_ldst_block, insn);
|
||
|
|
if (trans_STM(ctx, &u.f_ldst_block)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x00000200:
|
||
|
|
/* 1011011. ........ */
|
||
|
|
switch ((insn >> 5) & 0xf) {
|
||
|
|
case 0x2:
|
||
|
|
/* 10110110 010..... */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_21(ctx, &u.f_setend, insn);
|
||
|
|
switch (insn & 0x00000017) {
|
||
|
|
case 0x00000010:
|
||
|
|
/* 10110110 0101.000 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:209 */
|
||
|
|
if (trans_SETEND(ctx, &u.f_setend)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x3:
|
||
|
|
/* 10110110 011..... */
|
||
|
|
switch ((insn >> 3) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10110110 011.0... */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:211 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_22(ctx, &u.f_cps, insn);
|
||
|
|
if (trans_CPS(ctx, &u.f_cps)) return true;
|
||
|
|
if ((insn & 0x00000004) == 0x00000000) {
|
||
|
|
/* 10110110 011.00.. */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:212 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_23(ctx, &u.f_disas_t1616, insn);
|
||
|
|
if (trans_CPS_v7m(ctx, &u.f_disas_t1616)) return true;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0x00000800:
|
||
|
|
/* 1011110. ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:257 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_31(ctx, &u.f_ldst_block, insn);
|
||
|
|
if (trans_LDM_t16(ctx, &u.f_ldst_block)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x00000a00:
|
||
|
|
/* 1011111. ........ */
|
||
|
|
switch ((insn >> 8) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 10111110 ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:247 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_28(ctx, &u.f_i, insn);
|
||
|
|
if (trans_BKPT(ctx, &u.f_i)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 10111111 ........ */
|
||
|
|
if ((insn & 0x0000000f) == 0x00000000) {
|
||
|
|
/* 10111111 ....0000 */
|
||
|
|
if ((insn & 0x000000f0) == 0x00000010) {
|
||
|
|
/* 10111111 00010000 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:227 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_25(ctx, &u.f_empty, insn);
|
||
|
|
if (trans_YIELD(ctx, &u.f_empty)) return true;
|
||
|
|
}
|
||
|
|
if ((insn & 0x000000f0) == 0x00000020) {
|
||
|
|
/* 10111111 00100000 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:228 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_25(ctx, &u.f_empty, insn);
|
||
|
|
if (trans_WFE(ctx, &u.f_empty)) return true;
|
||
|
|
}
|
||
|
|
if ((insn & 0x000000f0) == 0x00000030) {
|
||
|
|
/* 10111111 00110000 */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:229 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_25(ctx, &u.f_empty, insn);
|
||
|
|
if (trans_WFI(ctx, &u.f_empty)) return true;
|
||
|
|
}
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:237 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_25(ctx, &u.f_empty, insn);
|
||
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
||
|
|
}
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:239 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_26(ctx, &u.f_disas_t1617, insn);
|
||
|
|
if (trans_IT(ctx, &u.f_disas_t1617)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0xc:
|
||
|
|
/* 1100.... ........ */
|
||
|
|
disas_t16_extract_ldstm(ctx, &u.f_ldst_block, insn);
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 11000... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:130 */
|
||
|
|
if (trans_STM(ctx, &u.f_ldst_block)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 11001... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:131 */
|
||
|
|
if (trans_LDM_t16(ctx, &u.f_ldst_block)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0xd:
|
||
|
|
/* 1101.... ........ */
|
||
|
|
if ((insn & 0x00000f00) == 0x00000e00) {
|
||
|
|
/* 11011110 ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:265 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_25(ctx, &u.f_empty, insn);
|
||
|
|
if (trans_UDF(ctx, &u.f_empty)) return true;
|
||
|
|
}
|
||
|
|
if ((insn & 0x00000f00) == 0x00000f00) {
|
||
|
|
/* 11011111 ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:266 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_28(ctx, &u.f_i, insn);
|
||
|
|
if (trans_SVC(ctx, &u.f_i)) return true;
|
||
|
|
}
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:267 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_32(ctx, &u.f_ci, insn);
|
||
|
|
if (trans_B_cond_thumb(ctx, &u.f_ci)) return true;
|
||
|
|
return false;
|
||
|
|
case 0xe:
|
||
|
|
/* 1110.... ........ */
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 11100... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:274 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_33(ctx, &u.f_i, insn);
|
||
|
|
if (trans_B(ctx, &u.f_i)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 11101... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:279 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_34(ctx, &u.f_i, insn);
|
||
|
|
if (trans_BLX_suffix(ctx, &u.f_i)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
case 0xf:
|
||
|
|
/* 1111.... ........ */
|
||
|
|
switch ((insn >> 11) & 0x1) {
|
||
|
|
case 0x0:
|
||
|
|
/* 11110... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:280 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_35(ctx, &u.f_i, insn);
|
||
|
|
if (trans_BL_BLX_prefix(ctx, &u.f_i)) return true;
|
||
|
|
return false;
|
||
|
|
case 0x1:
|
||
|
|
/* 11111... ........ */
|
||
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t16.decode:281 */
|
||
|
|
disas_t16_extract_disas_t16_Fmt_34(ctx, &u.f_i, insn);
|
||
|
|
if (trans_BL_suffix(ctx, &u.f_i)) return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|