2015-08-21 10:04:50 +03:00
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/* Unicorn Emulator Engine */
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/* By Nguyen Anh Quynh, 2015 */
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/* Sample code to demonstrate how to emulate ARM64 code */
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2015-12-08 10:21:32 +03:00
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#include <unicorn/unicorn.h>
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2017-01-22 17:05:08 +03:00
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#include <string.h>
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2015-08-21 10:04:50 +03:00
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// code to be emulated
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2021-10-29 13:44:49 +03:00
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#define ARM64_CODE \
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"\xab\x05\x00\xb8\xaf\x05\x40\x38" // str w11, [x13], #0; ldrb w15, [x13],
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// #0
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2023-05-11 22:42:20 +03:00
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// #define ARM64_CODE_EB "\xb8\x00\x05\xab\x38\x40\x05\xaf" // str w11, [x13];
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// ldrb w15, [x13]
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2021-10-03 17:14:44 +03:00
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#define ARM64_CODE_EB ARM64_CODE
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2015-08-21 10:04:50 +03:00
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2022-02-27 17:28:18 +03:00
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// mrs x2, tpidrro_el0
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#define ARM64_MRS_CODE "\x62\xd0\x3b\xd5"
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2015-08-21 10:04:50 +03:00
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// memory address where emulation starts
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#define ADDRESS 0x10000
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2021-10-29 13:44:49 +03:00
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static void hook_block(uc_engine *uc, uint64_t address, uint32_t size,
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void *user_data)
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2015-08-21 10:04:50 +03:00
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{
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2021-10-29 13:44:49 +03:00
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printf(">>> Tracing basic block at 0x%" PRIx64 ", block size = 0x%x\n",
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address, size);
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2015-08-21 10:04:50 +03:00
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}
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2021-10-29 13:44:49 +03:00
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static void hook_code(uc_engine *uc, uint64_t address, uint32_t size,
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void *user_data)
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2015-08-21 10:04:50 +03:00
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{
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2021-10-29 13:44:49 +03:00
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printf(">>> Tracing instruction at 0x%" PRIx64
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", instruction size = 0x%x\n",
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address, size);
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2015-08-21 10:04:50 +03:00
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}
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2021-10-03 17:14:44 +03:00
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static void test_arm64_mem_fetch(void)
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{
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2021-10-29 13:44:49 +03:00
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uc_engine *uc;
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2021-10-03 17:14:44 +03:00
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uc_err err;
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uint64_t x1, sp, x0;
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// msr x0, CurrentEL
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2021-10-29 13:44:49 +03:00
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unsigned char shellcode0[4] = {64, 66, 56, 213};
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2021-10-03 17:14:44 +03:00
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// .text:00000000004002C0 LDR X1, [SP,#arg_0]
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2021-10-29 13:44:49 +03:00
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unsigned char shellcode[4] = {0xE1, 0x03, 0x40, 0xF9};
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2021-10-03 17:14:44 +03:00
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unsigned shellcode_address = 0x4002C0;
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uint64_t data_address = 0x10000000000000;
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2021-10-29 13:44:49 +03:00
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printf(">>> Emulate ARM64 fetching stack data from high address %" PRIx64
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"\n",
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data_address);
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2021-10-03 17:14:44 +03:00
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// Initialize emulator in ARM mode
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err = uc_open(UC_ARCH_ARM64, UC_MODE_ARM, &uc);
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if (err) {
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2021-10-29 13:44:49 +03:00
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printf("Failed on uc_open() with error returned: %u (%s)\n", err,
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uc_strerror(err));
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2021-10-03 17:14:44 +03:00
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return;
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}
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uc_mem_map(uc, data_address, 0x30000, UC_PROT_ALL);
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uc_mem_map(uc, 0x400000, 0x1000, UC_PROT_ALL);
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sp = data_address;
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uc_reg_write(uc, UC_ARM64_REG_SP, &sp);
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uc_mem_write(uc, data_address, "\xc8\xc8\xc8\xc8\xc8\xc8\xc8\xc8", 8);
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uc_mem_write(uc, shellcode_address, shellcode0, 4);
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uc_mem_write(uc, shellcode_address + 4, shellcode, 4);
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2021-10-29 13:44:49 +03:00
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err = uc_emu_start(uc, shellcode_address, shellcode_address + 4, 0, 0);
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2021-10-03 17:14:44 +03:00
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if (err) {
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printf("Failed on uc_emu_start() with error returned: %u\n", err);
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}
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x0 = 0;
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uc_reg_read(uc, UC_ARM64_REG_X0, &x0);
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2021-10-29 13:44:49 +03:00
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printf(">>> x0(Exception Level)=%" PRIx64 "\n", x0 >> 2);
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2021-10-03 17:14:44 +03:00
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2021-10-29 13:44:49 +03:00
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err = uc_emu_start(uc, shellcode_address + 4, shellcode_address + 8, 0, 0);
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2021-10-03 17:14:44 +03:00
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if (err) {
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printf("Failed on uc_emu_start() with error returned: %u\n", err);
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}
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uc_reg_read(uc, UC_ARM64_REG_X1, &x1);
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printf(">>> X1 = 0x%" PRIx64 "\n", x1);
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uc_close(uc);
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}
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2015-08-21 10:04:50 +03:00
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static void test_arm64(void)
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{
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2015-09-05 06:20:32 +03:00
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uc_engine *uc;
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2015-08-21 10:04:50 +03:00
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uc_err err;
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2015-09-05 06:20:32 +03:00
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uc_hook trace1, trace2;
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2015-08-21 10:04:50 +03:00
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2021-10-29 13:44:49 +03:00
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int64_t x11 = 0x12345678; // X11 register
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int64_t x13 = 0x10000 + 0x8; // X13 register
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int64_t x15 = 0x33; // X15 register
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2015-08-21 10:04:50 +03:00
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printf("Emulate ARM64 code\n");
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// Initialize emulator in ARM mode
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2015-08-26 15:30:49 +03:00
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err = uc_open(UC_ARCH_ARM64, UC_MODE_ARM, &uc);
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2015-08-21 10:04:50 +03:00
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if (err) {
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2021-10-29 13:44:49 +03:00
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printf("Failed on uc_open() with error returned: %u (%s)\n", err,
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uc_strerror(err));
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2015-08-21 10:04:50 +03:00
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return;
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}
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// map 2MB memory for this emulation
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2015-08-30 07:02:33 +03:00
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uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL);
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2015-08-21 10:04:50 +03:00
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// write machine code to be emulated to memory
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2021-10-03 17:14:44 +03:00
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uc_mem_write(uc, ADDRESS, ARM64_CODE, sizeof(ARM64_CODE) - 1);
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2015-08-21 10:04:50 +03:00
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// initialize machine registers
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2015-08-26 15:30:49 +03:00
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uc_reg_write(uc, UC_ARM64_REG_X11, &x11);
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uc_reg_write(uc, UC_ARM64_REG_X13, &x13);
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uc_reg_write(uc, UC_ARM64_REG_X15, &x15);
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2015-08-21 10:04:50 +03:00
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// tracing all basic blocks with customized callback
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2016-02-11 03:02:13 +03:00
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uc_hook_add(uc, &trace1, UC_HOOK_BLOCK, hook_block, NULL, 1, 0);
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2015-08-21 10:04:50 +03:00
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// tracing one instruction at ADDRESS with customized callback
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2016-02-11 03:02:13 +03:00
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uc_hook_add(uc, &trace2, UC_HOOK_CODE, hook_code, NULL, ADDRESS, ADDRESS);
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2015-08-21 10:04:50 +03:00
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// emulate machine code in infinite time (last param = 0), or when
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// finishing all the code.
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2021-10-29 13:44:49 +03:00
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err = uc_emu_start(uc, ADDRESS, ADDRESS + sizeof(ARM64_CODE) - 1, 0, 0);
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2015-08-21 10:04:50 +03:00
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if (err) {
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printf("Failed on uc_emu_start() with error returned: %u\n", err);
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}
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// now print out some registers
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printf(">>> Emulation done. Below is the CPU context\n");
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2017-05-04 15:00:48 +03:00
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printf(">>> As little endian, X15 should be 0x78:\n");
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2015-08-21 10:04:50 +03:00
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2017-05-04 15:00:48 +03:00
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uc_reg_read(uc, UC_ARM64_REG_X15, &x15);
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printf(">>> X15 = 0x%" PRIx64 "\n", x15);
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2015-08-21 10:04:50 +03:00
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2015-08-26 15:30:49 +03:00
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uc_close(uc);
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2015-08-21 10:04:50 +03:00
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}
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2021-10-03 17:14:44 +03:00
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static void test_arm64eb(void)
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2015-08-21 10:04:50 +03:00
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{
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2021-10-03 17:14:44 +03:00
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uc_engine *uc;
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uc_err err;
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uc_hook trace1, trace2;
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2021-10-29 13:44:49 +03:00
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int64_t x11 = 0x12345678; // X11 register
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int64_t x13 = 0x10000 + 0x8; // X13 register
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int64_t x15 = 0x33; // X15 register
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2021-10-03 17:14:44 +03:00
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printf("Emulate ARM64 Big-Endian code\n");
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// Initialize emulator in ARM mode
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err = uc_open(UC_ARCH_ARM64, UC_MODE_ARM + UC_MODE_BIG_ENDIAN, &uc);
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if (err) {
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2021-10-29 13:44:49 +03:00
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printf("Failed on uc_open() with error returned: %u (%s)\n", err,
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uc_strerror(err));
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2021-10-03 17:14:44 +03:00
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return;
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}
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// map 2MB memory for this emulation
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uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL);
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// write machine code to be emulated to memory
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uc_mem_write(uc, ADDRESS, ARM64_CODE_EB, sizeof(ARM64_CODE_EB) - 1);
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// initialize machine registers
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uc_reg_write(uc, UC_ARM64_REG_X11, &x11);
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uc_reg_write(uc, UC_ARM64_REG_X13, &x13);
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uc_reg_write(uc, UC_ARM64_REG_X15, &x15);
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// tracing all basic blocks with customized callback
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uc_hook_add(uc, &trace1, UC_HOOK_BLOCK, hook_block, NULL, 1, 0);
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// tracing one instruction at ADDRESS with customized callback
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uc_hook_add(uc, &trace2, UC_HOOK_CODE, hook_code, NULL, ADDRESS, ADDRESS);
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// emulate machine code in infinite time (last param = 0), or when
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// finishing all the code.
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2021-10-29 13:44:49 +03:00
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err = uc_emu_start(uc, ADDRESS, ADDRESS + sizeof(ARM64_CODE_EB) - 1, 0, 0);
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2021-10-03 17:14:44 +03:00
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if (err) {
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printf("Failed on uc_emu_start() with error returned: %u\n", err);
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2015-12-09 19:53:48 +03:00
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}
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2021-10-03 17:14:44 +03:00
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// now print out some registers
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printf(">>> Emulation done. Below is the CPU context\n");
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printf(">>> As big endian, X15 should be 0x78:\n");
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uc_reg_read(uc, UC_ARM64_REG_X15, &x15);
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printf(">>> X15 = 0x%" PRIx64 "\n", x15);
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uc_close(uc);
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}
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2023-10-08 14:39:13 +03:00
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static void test_arm64_sctlr(void)
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2022-02-12 00:13:01 +03:00
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{
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uc_engine *uc;
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uc_err err;
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uc_arm64_cp_reg reg;
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printf("Read the SCTLR register.\n");
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err = uc_open(UC_ARCH_ARM64, UC_MODE_LITTLE_ENDIAN | UC_MODE_ARM, &uc);
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if (err != UC_ERR_OK) {
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2022-02-27 17:28:18 +03:00
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printf("Failed on uc_open() with error returned: %u\n", err);
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2022-02-12 00:13:01 +03:00
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}
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// SCTLR_EL1. See arm reference.
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reg.crn = 1;
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reg.crm = 0;
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reg.op0 = 0b11;
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reg.op1 = 0;
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reg.op2 = 0;
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err = uc_reg_read(uc, UC_ARM64_REG_CP_REG, ®);
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if (err != UC_ERR_OK) {
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printf("Failed on uc_reg_read() with error returned: %u\n", err);
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}
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printf(">>> SCTLR_EL1 = 0x%" PRIx64 "\n", reg.val);
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reg.op1 = 0b100;
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err = uc_reg_read(uc, UC_ARM64_REG_CP_REG, ®);
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if (err != UC_ERR_OK) {
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printf("Failed on uc_reg_read() with error returned: %u\n", err);
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}
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printf(">>> SCTLR_EL2 = 0x%" PRIx64 "\n", reg.val);
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uc_close(uc);
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}
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2022-02-27 17:28:18 +03:00
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static uint32_t hook_mrs(uc_engine *uc, uc_arm64_reg reg,
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const uc_arm64_cp_reg *cp_reg, void *user_data)
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{
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uint64_t r_x2 = 0x114514;
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printf(">>> Hook MSR instruction. Write 0x114514 to X2.\n");
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uc_reg_write(uc, reg, &r_x2);
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// Skip
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return 1;
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}
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2023-10-08 14:39:13 +03:00
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static void test_arm64_hook_mrs(void)
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2022-02-27 17:28:18 +03:00
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{
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uc_engine *uc;
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uc_err err;
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uint64_t r_x2;
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uc_hook hk;
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printf("Hook MRS instruction.\n");
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err = uc_open(UC_ARCH_ARM64, UC_MODE_LITTLE_ENDIAN | UC_MODE_ARM, &uc);
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if (err != UC_ERR_OK) {
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printf("Failed on uc_open() with error returned: %u\n", err);
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}
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err = uc_mem_map(uc, 0x1000, 0x1000, UC_PROT_ALL);
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if (err != UC_ERR_OK) {
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printf("Failed on uc_mem_map() with error returned: %u\n", err);
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}
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err = uc_mem_write(uc, 0x1000, ARM64_MRS_CODE, sizeof(ARM64_MRS_CODE));
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if (err != UC_ERR_OK) {
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printf("Failed on uc_mem_write() with error returned: %u\n", err);
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}
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err = uc_hook_add(uc, &hk, UC_HOOK_INSN, hook_mrs, NULL, 1, 0,
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UC_ARM64_INS_MRS);
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if (err != UC_ERR_OK) {
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printf("Failed on uc_hook_add() with error returned: %u\n", err);
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}
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err = uc_emu_start(uc, 0x1000, 0x1000 + sizeof(ARM64_MRS_CODE) - 1, 0, 0);
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if (err != UC_ERR_OK) {
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printf("Failed on uc_emu_start() with error returned: %u\n", err);
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}
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err = uc_reg_read(uc, UC_ARM64_REG_X2, &r_x2);
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if (err != UC_ERR_OK) {
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printf("Failed on uc_reg_read() with error returned: %u\n", err);
|
|
|
|
}
|
|
|
|
|
|
|
|
printf(">>> X2 = 0x%" PRIx64 "\n", r_x2);
|
|
|
|
|
|
|
|
uc_close(uc);
|
|
|
|
}
|
|
|
|
|
2024-02-11 19:10:58 +03:00
|
|
|
#define CHECK(x) \
|
|
|
|
do { \
|
|
|
|
if ((x) != UC_ERR_OK) { \
|
|
|
|
fprintf(stderr, "FAIL at %s:%d: %s\n", __FILE__, __LINE__, #x); \
|
|
|
|
exit(1); \
|
|
|
|
} \
|
|
|
|
} while (0)
|
2023-06-18 00:22:56 +03:00
|
|
|
|
|
|
|
/* Test PAC support in the emulator. Code adapted from
|
|
|
|
https://github.com/unicorn-engine/unicorn/issues/1789#issuecomment-1536320351 */
|
2023-05-15 02:23:49 +03:00
|
|
|
static void test_arm64_pac(void)
|
|
|
|
{
|
|
|
|
uc_engine *uc;
|
|
|
|
uint64_t x1 = 0x0000aaaabbbbccccULL;
|
|
|
|
|
2024-02-11 19:10:58 +03:00
|
|
|
// paciza x1
|
|
|
|
#define ARM64_PAC_CODE "\xe1\x23\xc1\xda"
|
2023-05-15 02:23:49 +03:00
|
|
|
|
|
|
|
printf("Try ARM64 PAC\n");
|
|
|
|
|
|
|
|
// Initialize emulator in ARM mode
|
|
|
|
CHECK(uc_open(UC_ARCH_ARM64, UC_MODE_ARM, &uc));
|
|
|
|
CHECK(uc_ctl_set_cpu_model(uc, UC_CPU_ARM64_MAX));
|
|
|
|
CHECK(uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL));
|
2024-02-11 19:10:58 +03:00
|
|
|
CHECK(
|
|
|
|
uc_mem_write(uc, ADDRESS, ARM64_PAC_CODE, sizeof(ARM64_PAC_CODE) - 1));
|
2023-05-15 02:23:49 +03:00
|
|
|
CHECK(uc_reg_write(uc, UC_ARM64_REG_X1, &x1));
|
|
|
|
|
|
|
|
/** Initialize PAC support **/
|
|
|
|
uc_arm64_cp_reg reg;
|
|
|
|
|
|
|
|
// SCR_EL3
|
|
|
|
reg.op0 = 0b11;
|
|
|
|
reg.op1 = 0b110;
|
|
|
|
reg.crn = 0b0001;
|
|
|
|
reg.crm = 0b0001;
|
|
|
|
reg.op2 = 0b000;
|
|
|
|
|
|
|
|
CHECK(uc_reg_read(uc, UC_ARM64_REG_CP_REG, ®));
|
|
|
|
|
|
|
|
// NS && RW && API
|
2024-02-11 19:10:58 +03:00
|
|
|
reg.val |= (1 | (1 << 10) | (1 << 17));
|
2023-05-15 02:23:49 +03:00
|
|
|
|
|
|
|
CHECK(uc_reg_write(uc, UC_ARM64_REG_CP_REG, ®));
|
|
|
|
|
|
|
|
// SCTLR_EL1
|
|
|
|
reg.op0 = 0b11;
|
|
|
|
reg.op1 = 0b000;
|
|
|
|
reg.crn = 0b0001;
|
|
|
|
reg.crm = 0b0000;
|
|
|
|
reg.op2 = 0b000;
|
|
|
|
|
|
|
|
CHECK(uc_reg_read(uc, UC_ARM64_REG_CP_REG, ®));
|
|
|
|
|
|
|
|
// EnIA && EnIB
|
2024-02-11 19:10:58 +03:00
|
|
|
reg.val |= (1 << 31) | (1 << 30);
|
2023-05-15 02:23:49 +03:00
|
|
|
|
|
|
|
CHECK(uc_reg_write(uc, UC_ARM64_REG_CP_REG, ®));
|
2024-02-11 19:10:58 +03:00
|
|
|
|
2023-05-15 02:23:49 +03:00
|
|
|
// HCR_EL2
|
|
|
|
reg.op0 = 0b11;
|
|
|
|
reg.op1 = 0b100;
|
|
|
|
reg.crn = 0b0001;
|
|
|
|
reg.crm = 0b0001;
|
|
|
|
reg.op2 = 0b000;
|
|
|
|
|
|
|
|
// HCR.API
|
2024-02-11 19:10:58 +03:00
|
|
|
reg.val |= (1ULL << 41);
|
2023-05-15 02:23:49 +03:00
|
|
|
|
|
|
|
CHECK(uc_reg_write(uc, UC_ARM64_REG_CP_REG, ®));
|
|
|
|
|
|
|
|
/** Check that PAC worked **/
|
2024-02-11 19:10:58 +03:00
|
|
|
CHECK(
|
|
|
|
uc_emu_start(uc, ADDRESS, ADDRESS + sizeof(ARM64_PAC_CODE) - 1, 0, 0));
|
2023-05-15 02:23:49 +03:00
|
|
|
CHECK(uc_reg_read(uc, UC_ARM64_REG_X1, &x1));
|
|
|
|
|
|
|
|
printf("X1 = 0x%" PRIx64 "\n", x1);
|
|
|
|
if (x1 == 0x0000aaaabbbbccccULL) {
|
|
|
|
printf("FAIL: No PAC tag added!\n");
|
|
|
|
} else {
|
|
|
|
// Expect 0x1401aaaabbbbccccULL with the default key
|
|
|
|
printf("SUCCESS: PAC tag found.\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
uc_close(uc);
|
|
|
|
}
|
|
|
|
|
2021-10-03 17:14:44 +03:00
|
|
|
int main(int argc, char **argv, char **envp)
|
2021-10-29 13:44:49 +03:00
|
|
|
{
|
2021-10-03 17:14:44 +03:00
|
|
|
test_arm64_mem_fetch();
|
2023-05-15 02:23:49 +03:00
|
|
|
|
|
|
|
printf("-------------------------\n");
|
2017-01-21 04:28:22 +03:00
|
|
|
test_arm64();
|
2015-12-08 10:21:32 +03:00
|
|
|
|
2021-10-03 17:14:44 +03:00
|
|
|
printf("-------------------------\n");
|
|
|
|
test_arm64eb();
|
|
|
|
|
2022-02-12 00:13:01 +03:00
|
|
|
printf("-------------------------\n");
|
|
|
|
test_arm64_sctlr();
|
|
|
|
|
2022-02-27 17:28:18 +03:00
|
|
|
printf("-------------------------\n");
|
|
|
|
test_arm64_hook_mrs();
|
|
|
|
|
2023-05-15 02:23:49 +03:00
|
|
|
printf("-------------------------\n");
|
|
|
|
test_arm64_pac();
|
|
|
|
|
2015-08-21 10:04:50 +03:00
|
|
|
return 0;
|
|
|
|
}
|