2015-09-09 18:27:13 +03:00
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#!/usr/bin/python
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from capstone import *
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from unicorn import *
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2015-09-17 23:45:15 +03:00
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import regress
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2015-09-09 18:27:13 +03:00
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2015-09-17 23:45:15 +03:00
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class MipsBranchDelay(regress.RegressTest):
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2015-09-09 18:27:13 +03:00
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2015-09-17 23:45:15 +03:00
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def runTest(self):
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md = Cs(CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_LITTLE_ENDIAN)
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2015-09-09 18:27:13 +03:00
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2015-09-17 23:45:15 +03:00
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def disas(code, addr):
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for i in md.disasm(code, addr):
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2015-12-10 05:09:31 +03:00
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print '0x%x: %s %-6s %s' % (i.address, str(i.bytes).encode('hex'), i.mnemonic, i.op_str)
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2015-09-09 18:27:13 +03:00
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2015-09-17 23:45:15 +03:00
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def hook_code(uc, addr, size, _):
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mem = str(uc.mem_read(addr, size))
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disas(mem, addr)
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2015-09-09 18:27:13 +03:00
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2015-09-17 23:45:15 +03:00
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CODE = 0x400000
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2015-09-22 06:59:53 +03:00
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asm = '0000a4126a00822800000000'.decode('hex') # beq $a0, $s5, 0x4008a0; slti $v0, $a0, 0x6a; nop
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2015-09-09 18:27:13 +03:00
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2015-09-17 23:45:15 +03:00
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print 'Input instructions:'
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disas(asm, CODE)
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print
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print 'Hooked instructions:'
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uc = Uc(UC_ARCH_MIPS, UC_MODE_MIPS32 + UC_MODE_LITTLE_ENDIAN)
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uc.hook_add(UC_HOOK_CODE, hook_code)
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uc.mem_map(CODE, 0x1000)
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uc.mem_write(CODE, asm)
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self.assertEqual(None, uc.emu_start(CODE, CODE + len(asm)))
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if __name__ == '__main__':
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regress.main()
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