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https://github.com/frida/tinycc
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x86-64-asm: More opcodes
Implement some more opcodes, syscall, sysret, lfence, mfence, sfence.
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1a5eacb445
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@ -893,6 +893,15 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
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pc = 0;
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pc = 0;
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if (pa->instr_type & OPC_MODRM) {
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if (pa->instr_type & OPC_MODRM) {
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if (!nb_ops) {
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/* A modrm opcode without operands is a special case (e.g. mfence).
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It has a group and acts as if there's an register operand 0
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(ax). */
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i = 0;
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ops[i].type = OP_REG;
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ops[i].reg = 0;
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goto modrm_found;
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}
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/* first look for an ea operand */
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/* first look for an ea operand */
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for(i = 0;i < nb_ops; i++) {
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for(i = 0;i < nb_ops; i++) {
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if (op_type[i] & OP_EA)
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if (op_type[i] & OP_EA)
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@ -607,6 +607,13 @@ int $0x10
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rdmsr
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rdmsr
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rdpmc
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rdpmc
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ud2
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ud2
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#ifdef __x86_64__
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syscall
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sysret
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lfence
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mfence
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sfence
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#endif
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emms
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emms
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movd %edx, %mm3
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movd %edx, %mm3
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@ -88,6 +88,9 @@ ALT(DEF_ASM_OP2(btcw, 0x0fba, 7, OPC_MODRM | OPC_WLX, OPT_IM8, OPT_REGW | OPT_EA
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DEF_ASM_OP0(rdtsc, 0x0f31)
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DEF_ASM_OP0(rdtsc, 0x0f31)
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DEF_ASM_OP0(rdmsr, 0x0f32)
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DEF_ASM_OP0(rdmsr, 0x0f32)
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DEF_ASM_OP0(rdpmc, 0x0f33)
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DEF_ASM_OP0(rdpmc, 0x0f33)
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DEF_ASM_OP0(syscall, 0x0f05)
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DEF_ASM_OP0(sysret, 0x0f07)
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DEF_ASM_OP0(ud2, 0x0f0b)
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DEF_ASM_OP0(ud2, 0x0f0b)
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/* NOTE: we took the same order as gas opcode definition order */
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/* NOTE: we took the same order as gas opcode definition order */
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@ -482,6 +485,9 @@ ALT(DEF_ASM_OP2(movhps, 0x0f17, 0, OPC_MODRM, OPT_SSE, OPT_EA | OPT_REG32 ))
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DEF_ASM_OP2(sqrtps, 0x0f51, 0, OPC_MODRM, OPT_EA | OPT_SSE, OPT_SSE )
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DEF_ASM_OP2(sqrtps, 0x0f51, 0, OPC_MODRM, OPT_EA | OPT_SSE, OPT_SSE )
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DEF_ASM_OP2(subps, 0x0f5c, 0, OPC_MODRM, OPT_EA | OPT_SSE, OPT_SSE )
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DEF_ASM_OP2(subps, 0x0f5c, 0, OPC_MODRM, OPT_EA | OPT_SSE, OPT_SSE )
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DEF_ASM_OP0L(lfence, 0x0fae, 5, OPC_MODRM)
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DEF_ASM_OP0L(mfence, 0x0fae, 6, OPC_MODRM)
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DEF_ASM_OP0L(sfence, 0x0fae, 7, OPC_MODRM)
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#undef ALT
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#undef ALT
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#undef DEF_ASM_OP0
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#undef DEF_ASM_OP0
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#undef DEF_ASM_OP0L
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#undef DEF_ASM_OP0L
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