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https://github.com/frida/tinycc
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x86-64-asm: Add mov[sz]xq opcodes
This adds the zero/sign-extending opcodes with 64bit destinations.
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@ -152,6 +152,9 @@
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DEF_ASM(movsbl)
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DEF_ASM(movswl)
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#ifdef TCC_TARGET_X86_64
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DEF_ASM(movsbq)
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DEF_ASM(movswq)
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DEF_ASM(movzwq)
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DEF_ASM(movslq)
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#endif
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@ -86,6 +86,13 @@ movl %ebx, %fs
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movzb 0x1000, %eax
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movzb 0x1000, %ax
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#ifdef __x86_64__
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movzb 0x1000, %rax
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movzbq 0x1000, %rbx
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movsbq 0x1000, %rdx
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movzwq 0x1000, %rdi
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movswq 0x1000, %rdx
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#endif
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#ifdef __i386__
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pushl %eax
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@ -114,12 +114,15 @@ ALT(DEF_ASM_OP2(movw, 0x0f21, 0, OPC_MODRM | OPC_WLQ, OPT_DB, OPT_REG64))
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ALT(DEF_ASM_OP2(movw, 0x0f22, 0, OPC_MODRM | OPC_WLQ, OPT_REG64, OPT_CR))
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ALT(DEF_ASM_OP2(movw, 0x0f23, 0, OPC_MODRM | OPC_WLQ, OPT_REG64, OPT_DB))
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ALT(DEF_ASM_OP2(movsbl, 0x0fbe, 0, OPC_MODRM, OPT_REG8 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(movsbw, 0x0fbe, 0, OPC_MODRM | OPC_D16, OPT_REG8 | OPT_EA, OPT_REG16))
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ALT(DEF_ASM_OP2(movsbl, 0x0fbe, 0, OPC_MODRM, OPT_REG8 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(movsbq, 0x0fbe, 0, OPC_MODRM, OPT_REG8 | OPT_EA, OPT_REGW))
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ALT(DEF_ASM_OP2(movswl, 0x0fbf, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(movswq, 0x0fbf, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG))
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ALT(DEF_ASM_OP2(movslq, 0x4863, 0, OPC_MODRM, OPT_REG32 | OPT_EA, OPT_REG))
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ALT(DEF_ASM_OP2(movzbw, 0x0fb6, 0, OPC_MODRM | OPC_WLQ, OPT_REG8 | OPT_EA, OPT_REGW))
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ALT(DEF_ASM_OP2(movzwl, 0x0fb7, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(movzwq, 0x0fb7, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG))
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ALT(DEF_ASM_OP1(pushq, 0x6a, 0, 0, OPT_IM8S))
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ALT(DEF_ASM_OP1(push, 0x6a, 0, 0, OPT_IM8S))
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