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https://github.com/frida/tinycc
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x86-asm: Fix signed constants and opcode order
Two things: negative constants were rejected (e.g. "add $-15,%eax"). Second the insn order was such that the arithmetic IM8S forms weren't used (always the IM32 ones). Switching them prefers those but requires a fix for size calculation in case the opcodes were OPC_ARITH and OPC_WLX (whose size starts with 1, not zero).
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@ -355,7 +355,7 @@ static void parse_operand(TCCState *s1, Operand *op)
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if (op->e.v == (uint16_t)op->e.v)
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op->type |= OP_IM16;
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#ifdef TCC_TARGET_X86_64
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if (op->e.v != (uint32_t)op->e.v)
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if (op->e.v != (int32_t)op->e.v)
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op->type = OP_IM64;
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#endif
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}
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@ -551,6 +551,8 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
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if (!(opcode >= pa->sym && opcode < pa->sym + 8*NBWLX))
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continue;
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s = (opcode - pa->sym) % NBWLX;
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if ((pa->instr_type & OPC_BWLX) == OPC_WLX)
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s++;
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} else if (pa->instr_type & OPC_SHIFT) {
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if (!(opcode >= pa->sym && opcode < pa->sym + 7*NBWLX))
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continue;
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@ -157,8 +157,8 @@ ALT(DEF_ASM_OP2(lgs, 0x0fb5, 0, OPC_MODRM, OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(addb, 0x00, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG)) /* XXX: use D bit ? */
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ALT(DEF_ASM_OP2(addb, 0x02, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))
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ALT(DEF_ASM_OP2(addb, 0x04, 0, OPC_ARITH | OPC_BWLX, OPT_IM, OPT_EAX))
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ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(addw, 0x83, 0, OPC_ARITH | OPC_MODRM | OPC_WLX, OPT_IM8S, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))
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@ -156,6 +156,8 @@ movl %ebx, %fs
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addl $0x123, %eax
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add $0x123, %ebx
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add $-16, %ecx
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add $-0x123, %esi
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addl $0x123, 0x100
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addl $0x123, 0x100(%ebx)
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addl $0x123, 0x100(%ebx,%edx,2)
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@ -216,6 +218,8 @@ add (%ebx), %dl
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div %bl
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div %ecx, %eax
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and $15,%bx
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and $-20,%edx
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shl %edx
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shl $10, %edx
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@ -690,3 +694,6 @@ ft1: ft2: ft3: ft4: ft5: ft6: ft7: ft8: ft9:
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.type ft8,"function"
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pause
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.rept 6
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nop
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.endr
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@ -166,8 +166,8 @@ ALT(DEF_ASM_OP2(lgs, 0x0fb5, 0, OPC_MODRM, OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(addb, 0x00, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG)) /* XXX: use D bit ? */
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ALT(DEF_ASM_OP2(addb, 0x02, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))
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ALT(DEF_ASM_OP2(addb, 0x04, 0, OPC_ARITH | OPC_BWLX, OPT_IM, OPT_EAX))
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ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(addw, 0x83, 0, OPC_ARITH | OPC_MODRM | OPC_WLX, OPT_IM8S, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG))
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ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))
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