mirror of
https://github.com/frida/tinycc
synced 2025-02-08 11:24:01 +03:00
x86_64-asm: =m operand fixes
The problem was with tcctest.c:
unsigned set;
__asm__("btsl %1,%0" : "=m"(set) : "Ir"(20) : "cc");
when with tcc compiled with the HAVE_SELINUX option, run with
tcc -run, it would use large addresses far beyond the 32bits
range when tcc did not use the pc-relative mode for accessing
'set' in global data memory. In fact the assembler did not
know about %rip at all.
Changes:
- memory operands use (%rax) not (%eax)
- conversion from VT_LLOCAL: use type VT_PTR
- support 'k' modifier
- support %rip register
- support X(%rip) pc-relative addresses
The test in tcctest.c is from Michael Matz.
This commit is contained in:
grischka
parent
47fd807f9b
commit
4a3741bf02
2
Makefile
2
Makefile
@ -176,7 +176,7 @@ $(ARM64_CROSS): $(ARM64_FILES)
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# libtcc generation and test
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ifndef ONE_SOURCE
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LIBTCC_OBJ = $(filter-out tcc.o,$(patsubst %.c,%.o,$(filter %.c,$(NATIVE_FILES))))
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LIBTCC_INC = $(filter %.h,$(CORE_FILES)) $(filter-out $(CORE_FILES),$(NATIVE_FILES))
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LIBTCC_INC = $(filter %.h,$(CORE_FILES)) $(filter-out $(CORE_FILES) i386-asm.c,$(NATIVE_FILES))
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else
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LIBTCC_OBJ = libtcc.o
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LIBTCC_INC = $(NATIVE_FILES)
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75
i386-asm.c
75
i386-asm.c
@ -276,6 +276,8 @@ static int asm_parse_reg(int *type)
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*type = OP_EA32;
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} else if (tok >= TOK_ASM_rax && tok <= TOK_ASM_rdi) {
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reg = tok - TOK_ASM_rax;
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} else if (tok == TOK_ASM_rip) {
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reg = 8;
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#endif
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} else {
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error_32:
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@ -444,7 +446,7 @@ static void gen_disp32(ExprValue *pe)
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}
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/* generate the modrm operand */
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static inline void asm_modrm(int reg, Operand *op)
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static inline int asm_modrm(int reg, Operand *op)
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{
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int mod, reg1, reg2, sib_reg1;
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@ -459,6 +461,13 @@ static inline void asm_modrm(int reg, Operand *op)
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g(0x05 + (reg << 3));
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#endif
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gen_expr32(&op->e);
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#ifdef TCC_TARGET_X86_64
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} else if (op->reg == 8) {
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ExprValue *pe = &op->e;
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g(0x05 + (reg << 3));
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gen_addrpc32(pe->sym ? VT_SYM : 0, pe->sym, pe->v);
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return ind;
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#endif
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} else {
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sib_reg1 = op->reg;
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/* fist compute displacement encoding */
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@ -491,12 +500,13 @@ static inline void asm_modrm(int reg, Operand *op)
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gen_expr32(&op->e);
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}
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}
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return 0;
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}
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ST_FUNC void asm_opcode(TCCState *s1, int opcode)
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{
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const ASMInstr *pa;
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int i, modrm_index, reg, v, op1, seg_prefix;
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int i, modrm_index, reg, v, op1, seg_prefix, pc;
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int nb_ops, s;
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Operand ops[MAX_OPERANDS], *pop;
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int op_type[3]; /* decoded op type */
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@ -802,6 +812,8 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
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} else {
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reg = (pa->instr_type >> OPC_GROUP_SHIFT) & 7;
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}
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pc = 0;
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if (pa->instr_type & OPC_MODRM) {
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/* first look for an ea operand */
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for(i = 0;i < nb_ops; i++) {
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@ -828,8 +840,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
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break;
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}
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}
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asm_modrm(reg, &ops[modrm_index]);
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pc = asm_modrm(reg, &ops[modrm_index]);
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}
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/* emit constants */
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@ -858,30 +869,29 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
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else
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v = OP_IM64;
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}
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if ((v & (OP_IM8 | OP_IM8S | OP_IM16)) && ops[i].e.sym)
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tcc_error("cannot relocate");
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if (v & (OP_IM8 | OP_IM8S)) {
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if (ops[i].e.sym)
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goto error_relocate;
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g(ops[i].e.v);
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} else if (v & OP_IM16) {
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if (ops[i].e.sym)
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error_relocate:
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tcc_error("cannot relocate");
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else
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gen_le16(ops[i].e.v);
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} else {
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if (pa->instr_type & (OPC_JMP | OPC_SHORTJMP)) {
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gen_disp32(&ops[i].e);
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} else {
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gen_le16(ops[i].e.v);
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#ifdef TCC_TARGET_X86_64
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if (v & OP_IM64)
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gen_expr64(&ops[i].e);
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else
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} else if (v & OP_IM64) {
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gen_expr64(&ops[i].e);
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#endif
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gen_expr32(&ops[i].e);
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}
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} else if (pa->instr_type & (OPC_JMP | OPC_SHORTJMP)) {
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gen_disp32(&ops[i].e);
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} else {
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gen_expr32(&ops[i].e);
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}
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}
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}
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/* after immediate operands, adjust pc-relative address */
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if (pc)
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*(int*)(text_section->data + pc - 4) -= ind - pc;
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}
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/* return the constraint priority (we allocate first the lowest
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@ -1189,17 +1199,20 @@ ST_FUNC void subst_asm_operand(CString *add_str,
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cstr_ccat(add_str, '$');
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if (r & VT_SYM) {
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cstr_cat(add_str, get_tok_str(sv->sym->v, NULL), -1);
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if ((uint32_t)sv->c.i != 0) {
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cstr_ccat(add_str, '+');
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} else {
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return;
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}
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if ((uint32_t)sv->c.i == 0)
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goto no_offset;
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cstr_ccat(add_str, '+');
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}
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val = sv->c.i;
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if (modifier == 'n')
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val = -val;
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snprintf(buf, sizeof(buf), "%d", (int)sv->c.i);
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cstr_cat(add_str, buf, -1);
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no_offset:;
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#ifdef TCC_TARGET_X86_64
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if (r & VT_LVAL)
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cstr_cat(add_str, "(%rip)", -1);
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#endif
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} else if ((r & VT_VALMASK) == VT_LOCAL) {
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#ifdef TCC_TARGET_X86_64
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snprintf(buf, sizeof(buf), "%d(%%rbp)", (int)sv->c.i);
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@ -1212,7 +1225,12 @@ ST_FUNC void subst_asm_operand(CString *add_str,
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if (reg >= VT_CONST)
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tcc_error("internal compiler error");
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snprintf(buf, sizeof(buf), "(%%%s)",
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get_tok_str(TOK_ASM_eax + reg, NULL));
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#ifdef TCC_TARGET_X86_64
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get_tok_str(TOK_ASM_rax + reg, NULL)
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#else
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get_tok_str(TOK_ASM_eax + reg, NULL)
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#endif
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);
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cstr_cat(add_str, buf, -1);
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} else {
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/* register case */
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@ -1244,6 +1262,8 @@ ST_FUNC void subst_asm_operand(CString *add_str,
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size = -1;
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} else if (modifier == 'w') {
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size = 2;
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} else if (modifier == 'k') {
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size = 4;
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#ifdef TCC_TARGET_X86_64
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} else if (modifier == 'q') {
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size = 8;
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@ -1311,7 +1331,8 @@ ST_FUNC void asm_gen_code(ASMOperand *operands, int nb_operands,
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output cases) */
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SValue sv;
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sv = *op->vt;
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sv.r = (sv.r & ~VT_VALMASK) | VT_LOCAL;
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sv.r = (sv.r & ~VT_VALMASK) | VT_LOCAL | VT_LVAL;
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sv.type.t = VT_PTR;
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load(op->reg, &sv);
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} else if (i >= nb_outputs || op->is_rw) {
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/* load value in register */
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@ -35,6 +35,7 @@
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DEF_ASM(rbp)
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DEF_ASM(rsi)
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DEF_ASM(rdi)
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DEF_ASM(rip)
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#endif
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DEF_ASM(mm0)
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DEF_ASM(mm1)
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6
tccasm.c
6
tccasm.c
@ -977,7 +977,8 @@ static void subst_asm_operands(ASMOperand *operands, int nb_operands,
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}
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modifier = 0;
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if (*str == 'c' || *str == 'n' ||
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*str == 'b' || *str == 'w' || *str == 'h')
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*str == 'b' || *str == 'w' ||
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*str == 'h' || *str == 'k')
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modifier = *str++;
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index = find_constraint(operands, nb_operands, str, &str);
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if (index < 0)
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@ -1029,7 +1030,8 @@ static void parse_asm_operands(ASMOperand *operands, int *nb_operands_ptr,
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skip('(');
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gexpr();
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if (is_output) {
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test_lvalue();
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if (!(vtop->type.t & VT_ARRAY))
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test_lvalue();
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} else {
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/* we want to avoid LLOCAL case, except when the 'm'
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constraint is used. Note that it may come from
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2
tccrun.c
2
tccrun.c
@ -52,6 +52,8 @@ static void *win64_add_function_table(TCCState *s1);
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static void win64_del_function_table(void *);
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#endif
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// #define HAVE_SELINUX
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/* ------------------------------------------------------------- */
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/* Do all relocations (needed before using tcc_get_symbol())
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Returns -1 on error. */
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@ -2565,12 +2565,33 @@ static __inline__ unsigned long long inc64(unsigned long long a)
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return res;
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}
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struct struct123 {
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int a;
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int b;
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};
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struct struct1231 {
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unsigned long addr;
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};
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unsigned long mconstraint_test(struct struct1231 *r)
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{
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unsigned long ret;
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unsigned int a[2];
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a[0] = 0;
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__asm__ volatile ("lea %2,%0; movl 4(%0),%k0; addl %2,%k0; movl $51,%2; movl $52,4%2; movl $63,%1"
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: "=&r" (ret), "=m" (a)
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: "m" (*(struct struct123 *)r->addr));
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return ret + a[0];
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}
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unsigned int set;
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void asm_test(void)
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{
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char buf[128];
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unsigned int val;
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struct struct123 s1;
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struct struct1231 s2 = { (unsigned long)&s1 };
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printf("inline asm:\n");
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@ -2592,6 +2613,10 @@ void asm_test(void)
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printf("mul64=0x%Lx\n", mul64(0x12345678, 0xabcd1234));
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printf("inc64=0x%Lx\n", inc64(0x12345678ffffffff));
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s1.a = 42;
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s1.b = 43;
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printf("mconstraint: %d", mconstraint_test(&s2));
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printf(" %d %d\n", s1.a, s1.b);
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set = 0xff;
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sigdelset1(&set, 2);
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sigaddset1(&set, 16);
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@ -2600,9 +2625,6 @@ void asm_test(void)
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goto label1;
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label2:
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__asm__("btsl %1,%0" : "=m"(set) : "Ir"(20) : "cc");
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#ifdef __GNUC__ // works strange with GCC 4.3
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set=0x1080fd;
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#endif
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printf("set=0x%x\n", set);
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val = 0x01020304;
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printf("swab32(0x%08x) = 0x%0x\n", val, swab32(val));
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