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https://github.com/frida/tinycc
synced 2024-12-24 05:56:49 +03:00
ARM: use uint32_t for opcodes
fixes cross compiling on x86_64
This commit is contained in:
Daniel Glöckner
parent
6eac6b7254
commit
3de023b6c6
85
arm-gen.c
85
arm-gen.c
@ -168,7 +168,7 @@ ST_DATA const int reg_classes[NB_REGS] = {
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#endif
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};
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static unsigned long func_sub_sp_offset,last_itod_magic;
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static int func_sub_sp_offset, last_itod_magic;
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static int leaffunc;
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static int two2mask(int a,int b) {
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@ -181,7 +181,7 @@ static int regmask(int r) {
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/******************************************************/
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void o(unsigned int i)
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void o(uint32_t i)
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{
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/* this is a good place to start adding big-endian support*/
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int ind1;
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@ -201,10 +201,10 @@ void o(unsigned int i)
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cur_text_section->data[ind++] = i;
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}
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static unsigned long stuff_const(unsigned long op,unsigned long c)
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static uint32_t stuff_const(uint32_t op, uint32_t c)
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{
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int try_neg=0;
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unsigned long nc = 0,negop = 0;
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uint32_t nc = 0, negop = 0;
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switch(op&0x1F00000)
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{
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@ -238,7 +238,7 @@ static unsigned long stuff_const(unsigned long op,unsigned long c)
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break;
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}
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do {
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unsigned long m;
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uint32_t m;
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int i;
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if(c<256) /* catch undefined <<32 */
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return op|c;
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@ -255,13 +255,13 @@ static unsigned long stuff_const(unsigned long op,unsigned long c)
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//only add,sub
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void stuff_const_harder(unsigned long op,unsigned long v) {
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unsigned long x;
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void stuff_const_harder(uint32_t op, uint32_t v) {
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uint32_t x;
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x=stuff_const(op,v);
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if(x)
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o(x);
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else {
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unsigned long a[16],nv,no,o2,n2;
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uint32_t a[16], nv, no, o2, n2;
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int i,j,k;
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a[0]=0xff;
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o2=(op&0xfff0ffff)|((op&0xf000)<<4);;
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@ -311,7 +311,7 @@ void stuff_const_harder(unsigned long op,unsigned long v) {
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}
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}
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ST_FUNC unsigned long encbranch(int pos,int addr,int fail)
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ST_FUNC uint32_t encbranch(int pos, int addr, int fail)
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{
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addr-=pos+8;
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addr/=4;
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@ -326,7 +326,7 @@ ST_FUNC unsigned long encbranch(int pos,int addr,int fail)
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int decbranch(int pos)
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{
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int x;
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x=*(int *)(cur_text_section->data + pos);
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x=*(uint32_t *)(cur_text_section->data + pos);
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x&=0x00ffffff;
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if(x&0x800000)
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x-=0x1000000;
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@ -336,10 +336,10 @@ int decbranch(int pos)
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/* output a symbol and patch all calls to it */
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void gsym_addr(int t, int a)
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{
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unsigned long *x;
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uint32_t *x;
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int lt;
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while(t) {
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x=(unsigned long *)(cur_text_section->data + t);
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x=(uint32_t *)(cur_text_section->data + t);
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t=decbranch(lt=t);
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if(a==lt+4)
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*x=0xE1A00000; // nop
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@ -356,14 +356,14 @@ void gsym(int t)
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}
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#ifdef TCC_ARM_VFP
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static unsigned long vfpr(int r)
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static uint32_t vfpr(int r)
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{
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if(r<TREG_F0 || r>TREG_F7)
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error("compiler error! register %i is no vfp register",r);
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return r-5;
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}
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#else
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static unsigned long fpr(int r)
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static uint32_t fpr(int r)
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{
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if(r<TREG_F0 || r>TREG_F3)
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error("compiler error! register %i is no fpa register",r);
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@ -371,7 +371,7 @@ static unsigned long fpr(int r)
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}
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#endif
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static unsigned long intr(int r)
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static uint32_t intr(int r)
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{
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if(r==4)
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return 12;
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@ -380,10 +380,10 @@ static unsigned long intr(int r)
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return r;
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}
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static void calcaddr(unsigned long *base,int *off,int *sgn,int maxoff,unsigned shift)
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static void calcaddr(uint32_t *base, int *off, int *sgn, int maxoff, unsigned shift)
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{
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if(*off>maxoff || *off&((1<<shift)-1)) {
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unsigned long x,y;
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uint32_t x, y;
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x=0xE280E000;
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if(*sgn)
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x=0xE240E000;
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@ -407,7 +407,7 @@ static void calcaddr(unsigned long *base,int *off,int *sgn,int maxoff,unsigned s
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}
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}
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static unsigned long mapcc(int cc)
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static uint32_t mapcc(int cc)
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{
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switch(cc)
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{
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@ -477,7 +477,7 @@ static int negcc(int cc)
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void load(int r, SValue *sv)
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{
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int v, ft, fc, fr, sign;
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unsigned long op;
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uint32_t op;
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SValue v1;
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fr = sv->r;
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@ -493,7 +493,7 @@ void load(int r, SValue *sv)
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v = fr & VT_VALMASK;
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if (fr & VT_LVAL) {
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unsigned long base=0xB; // fp
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uint32_t base = 0xB; // fp
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if(v == VT_LLOCAL) {
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v1.type.t = VT_PTR;
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v1.r = VT_LOCAL | VT_LVAL;
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@ -617,7 +617,7 @@ void store(int r, SValue *sv)
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{
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SValue v1;
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int v, ft, fc, fr, sign;
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unsigned long op;
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uint32_t op;
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fr = sv->r;
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ft = sv->type.t;
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@ -632,7 +632,7 @@ void store(int r, SValue *sv)
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v = fr & VT_VALMASK;
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if (fr & VT_LVAL || fr == VT_LOCAL) {
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unsigned long base=0xb;
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uint32_t base = 0xb;
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if(v < VT_CONST) {
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base=intr(v);
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v=VT_LOCAL;
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@ -703,7 +703,7 @@ static void gcall_or_jmp(int is_jmp)
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{
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int r;
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if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
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unsigned long x;
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uint32_t x;
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/* constant case */
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x=encbranch(ind,ind+vtop->c.ul,0);
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if(x) {
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@ -987,7 +987,7 @@ void gfunc_prolog(CType *func_type)
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/* generate function epilog */
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void gfunc_epilog(void)
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{
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unsigned long x;
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uint32_t x;
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int diff;
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#ifdef TCC_ARM_EABI
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if(is_float(func_vt.t)) {
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@ -1008,15 +1008,15 @@ void gfunc_epilog(void)
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if(diff > 12) {
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x=stuff_const(0xE24BD000, diff); /* sub sp,fp,# */
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if(x)
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*(unsigned long *)(cur_text_section->data + func_sub_sp_offset) = x;
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*(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = x;
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else {
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unsigned long addr;
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int addr;
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addr=ind;
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o(0xE59FC004); /* ldr ip,[pc+4] */
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o(0xE04BD00C); /* sub sp,fp,ip */
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o(0xE1A0F00E); /* mov pc,lr */
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o(diff);
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*(unsigned long *)(cur_text_section->data + func_sub_sp_offset) = 0xE1000000|encbranch(func_sub_sp_offset,addr,1);
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*(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = 0xE1000000|encbranch(func_sub_sp_offset,addr,1);
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}
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}
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}
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@ -1040,7 +1040,7 @@ void gjmp_addr(int a)
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int gtst(int inv, int t)
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{
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int v, r;
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unsigned long op;
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uint32_t op;
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v = vtop->r & VT_VALMASK;
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r=ind;
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if (v == VT_CMP) {
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@ -1053,14 +1053,14 @@ int gtst(int inv, int t)
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if(!vtop->c.i)
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vtop->c.i=t;
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else {
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unsigned long *x;
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uint32_t *x;
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int p,lp;
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if(t) {
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p = vtop->c.i;
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do {
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p = decbranch(lp=p);
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} while(p);
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x = (unsigned long *)(cur_text_section->data + lp);
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x = (uint32_t *)(cur_text_section->data + lp);
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*x &= 0xff000000;
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*x |= encbranch(lp,t,1);
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}
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@ -1102,7 +1102,7 @@ int gtst(int inv, int t)
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void gen_opi(int op)
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{
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int c, func = 0;
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unsigned long opc = 0,r,fr;
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uint32_t opc = 0, r, fr;
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unsigned short retreg = REG_IRET;
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c=0;
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@ -1218,7 +1218,7 @@ void gen_opi(int op)
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vswap();
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opc=0xE0000000|(opc<<20)|(c<<16);
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if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
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unsigned long x;
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uint32_t x;
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x=stuff_const(opc|0x2000000,vtop->c.i);
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if(x) {
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r=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r)));
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@ -1284,7 +1284,7 @@ static int is_zero(int i)
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* two operands are guaranted to have the same floating point type */
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void gen_opf(int op)
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{
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unsigned long x;
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uint32_t x;
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int fneg=0,r;
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x=0xEE000A00|T2CPR(vtop->type.t);
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switch(op) {
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@ -1372,10 +1372,10 @@ void gen_opf(int op)
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}
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#else
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static int is_fconst()
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static uint32_t is_fconst()
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{
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long double f;
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int r;
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uint32_t r;
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if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
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return 0;
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if (vtop->type.t == VT_FLOAT)
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@ -1414,8 +1414,7 @@ static int is_fconst()
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two operands are guaranted to have the same floating point type */
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void gen_opf(int op)
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{
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unsigned long x;
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int r,r2,c1,c2;
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uint32_t x, r, r2, c1, c2;
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//fputs("gen_opf\n",stderr);
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vswap();
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c1 = is_fconst();
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@ -1580,11 +1579,12 @@ void gen_opf(int op)
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and 'long long' cases. */
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ST_FUNC void gen_cvt_itof1(int t)
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{
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int r,r2,bt;
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uint32_t r, r2;
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int bt;
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bt=vtop->type.t & VT_BTYPE;
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if(bt == VT_INT || bt == VT_SHORT || bt == VT_BYTE) {
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#ifndef TCC_ARM_VFP
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unsigned int dsize=0;
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uint32_t dsize = 0;
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#endif
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r=intr(gv(RC_INT));
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#ifdef TCC_ARM_VFP
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@ -1600,7 +1600,7 @@ ST_FUNC void gen_cvt_itof1(int t)
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dsize=0x80; /* flts -> fltd */
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o(0xEE000110|dsize|(r2<<16)|(r<<12)); /* flts */
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if((vtop->type.t & (VT_UNSIGNED|VT_BTYPE)) == (VT_UNSIGNED|VT_INT)) {
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unsigned int off=0;
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uint32_t off = 0;
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o(0xE3500000|(r<<12)); /* cmp */
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r=fpr(get_reg(RC_FLOAT));
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if(last_itod_magic) {
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@ -1660,7 +1660,8 @@ ST_FUNC void gen_cvt_itof1(int t)
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/* convert fp to int 't' type */
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void gen_cvt_ftoi(int t)
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{
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int r,r2,u,func=0;
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uint32_t r, r2;
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int u, func = 0;
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u=t&VT_UNSIGNED;
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t&=VT_BTYPE;
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r2=vtop->type.t & VT_BTYPE;
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@ -1721,7 +1722,7 @@ void gen_cvt_ftof(int t)
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{
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#ifdef TCC_ARM_VFP
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if(((vtop->type.t & VT_BTYPE) == VT_FLOAT) != ((t & VT_BTYPE) == VT_FLOAT)) {
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int r=vfpr(gv(RC_FLOAT));
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uint32_t r = vfpr(gv(RC_FLOAT));
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o(0xEEB70AC0|(r<<12)|r|T2CPR(vtop->type.t));
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}
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#else
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2
tcc.h
2
tcc.h
@ -1161,7 +1161,7 @@ ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c);
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/* ------------ arm-gen.c ------------ */
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#ifdef TCC_TARGET_ARM
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ST_FUNC unsigned long encbranch(int pos,int addr,int fail);
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ST_FUNC uint32_t encbranch(int pos, int addr, int fail);
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ST_FUNC void gen_cvt_itof1(int t);
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#endif
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