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x86-asm: Implement prefetchw opcode
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5692716770
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@ -622,6 +622,7 @@ int $0x10
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prefetcht0 (%rcx)
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prefetcht0 (%rcx)
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prefetcht1 (%rsi)
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prefetcht1 (%rsi)
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prefetcht2 (%rdi)
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prefetcht2 (%rdi)
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prefetchw (%rdi)
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clflush 0x1000(%rax,%rcx)
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clflush 0x1000(%rax,%rcx)
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fxsaveq (%rdx)
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fxsaveq (%rdx)
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fxrstorq (%rcx)
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fxrstorq (%rcx)
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@ -507,6 +507,7 @@ ALT(DEF_ASM_OP2(movhps, 0x0f17, 0, OPC_MODRM, OPT_SSE, OPT_EA | OPT_REG32 ))
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DEF_ASM_OP1(prefetcht0, 0x0f18, 1, OPC_MODRM, OPT_EA)
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DEF_ASM_OP1(prefetcht0, 0x0f18, 1, OPC_MODRM, OPT_EA)
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DEF_ASM_OP1(prefetcht1, 0x0f18, 2, OPC_MODRM, OPT_EA)
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DEF_ASM_OP1(prefetcht1, 0x0f18, 2, OPC_MODRM, OPT_EA)
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DEF_ASM_OP1(prefetcht2, 0x0f18, 3, OPC_MODRM, OPT_EA)
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DEF_ASM_OP1(prefetcht2, 0x0f18, 3, OPC_MODRM, OPT_EA)
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DEF_ASM_OP1(prefetchw, 0x0f0d, 1, OPC_MODRM, OPT_EA)
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DEF_ASM_OP0L(lfence, 0x0fae, 5, OPC_MODRM)
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DEF_ASM_OP0L(lfence, 0x0fae, 5, OPC_MODRM)
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DEF_ASM_OP0L(mfence, 0x0fae, 6, OPC_MODRM)
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DEF_ASM_OP0L(mfence, 0x0fae, 6, OPC_MODRM)
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DEF_ASM_OP0L(sfence, 0x0fae, 7, OPC_MODRM)
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DEF_ASM_OP0L(sfence, 0x0fae, 7, OPC_MODRM)
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