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upgrades to the qiradb

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This commit is contained in:
George Hotz 2014-08-19 22:28:49 -07:00
parent 98aeed755e
commit fdeb9245c7
7 changed files with 57 additions and 31 deletions
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2
middleware/qira_webserver.py
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@ -215,7 +215,7 @@ def getchanges(forknum, address, typ, cview):
forknums = [forknum]
ret = {}
for forknum in forknums:
ret[forknum] = program.traces[forknum].db.fetch_clnums_by_address_and_type(address, chr(ord(typ[0])), cview[0], LIMIT)
ret[forknum] = program.traces[forknum].db.fetch_clnums_by_address_and_type(address, chr(ord(typ[0])), cview[0], cview[1], LIMIT)
emit('changes', {'type': typ, 'clnums': ret})
@socketio.on('navigatefunction', namespace='/qira')

23
qiradb/qiradb/Trace.cpp
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@ -182,7 +182,7 @@ void Trace::process() {
clnum_to_entry_number_.resize(c->clnum);
}
clnum_to_entry_number_.push_back(entries_done_);
instruction_pages_.insert(c->address & PAGE_MASK);
pages_[c->address & PAGE_MASK] |= PAGE_INSTRUCTION;
}
// addresstype_to_clnums_
@ -198,8 +198,11 @@ void Trace::process() {
// memory_, data_pages_
if (type == 'L' || type == 'S') {
data_pages_.insert(c->address & PAGE_MASK);
if (type == 'L') {
pages_[c->address & PAGE_MASK] |= PAGE_READ;
}
if (type == 'S') {
pages_[c->address & PAGE_MASK] |= PAGE_WRITE;
int byte_count = (c->flags&SIZE_MASK)/8;
uint64_t data = c->data;
if (is_big_endian_) {
@ -243,14 +246,15 @@ void Trace::process() {
did_update_ = true;
}
vector<Clnum> Trace::FetchClnumsByAddressAndType(Address address, char type, Clnum start_clnum, unsigned int limit) {
vector<Clnum> Trace::FetchClnumsByAddressAndType(Address address, char type,
Clnum start_clnum, Clnum end_clnum, unsigned int limit) {
RWLOCK_RDLOCK(db_lock_);
vector<Clnum> ret;
pair<Address, char> p = MP(address, type);
unordered_map<pair<Address, char>, set<Clnum> >::iterator it = addresstype_to_clnums_.find(p);
if (it != addresstype_to_clnums_.end()) {
for (set<Clnum>::iterator it2 = it->second.lower_bound(start_clnum);
it2 != it->second.end(); ++it2) {
it2 != it->second.end() && *it2 < end_clnum; ++it2) {
ret.push_back(*it2);
if (ret.size() == limit) break;
}
@ -304,16 +308,9 @@ vector<uint64_t> Trace::FetchRegisters(Clnum clnum) {
return ret;
}
set<Address> Trace::GetInstructionPages() {
map<Address, char> Trace::GetPages() {
RWLOCK_RDLOCK(db_lock_);
set<Address> ret = instruction_pages_;
RWLOCK_UNLOCK(db_lock_);
return ret;
}
set<Address> Trace::GetDataPages() {
RWLOCK_RDLOCK(db_lock_);
set<Address> ret = data_pages_;
map<Address, char> ret = pages_;
RWLOCK_UNLOCK(db_lock_);
return ret;
}

12
qiradb/qiradb/Trace.h
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@ -87,6 +87,10 @@ struct change {
#define IS_SYSCALL 0x08000000
#define SIZE_MASK 0xFF
#define PAGE_INSTRUCTION 1
#define PAGE_READ 2
#define PAGE_WRITE 4
void *thread_entry(void *);
class Trace {
@ -96,14 +100,13 @@ public:
bool ConnectToFileAndStart(char *filename, int register_size, int register_count, bool is_big_endian);
// these must be threadsafe
vector<Clnum> FetchClnumsByAddressAndType(Address address, char type, Clnum start_clnum, unsigned int limit);
vector<Clnum> FetchClnumsByAddressAndType(Address address, char type, Clnum start_clnum, Clnum end_clnum, unsigned int limit);
vector<struct change> FetchChangesByClnum(Clnum clnum, unsigned int limit);
vector<MemoryWithValid> FetchMemory(Clnum clnum, Address address, int len);
vector<uint64_t> FetchRegisters(Clnum clnum);
// simple ones
set<Address> GetInstructionPages();
set<Address> GetDataPages();
map<Address, char> GetPages();
Clnum GetMaxClnum() { return max_clnum_; }
Clnum GetMinClnum() { return min_clnum_; }
@ -127,8 +130,7 @@ private:
vector<EntryNumber> clnum_to_entry_number_;
vector<RegisterCell> registers_; int register_size_, register_count_;
map<Address, MemoryCell> memory_;
set<Address> instruction_pages_;
set<Address> data_pages_;
map<Address, char> pages_;
Clnum max_clnum_, min_clnum_;
bool remap_backing(uint64_t);

22
qiradb/qiradb/_qiradb.cpp
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@ -52,12 +52,12 @@ static PyObject *did_update(PyTrace *self) {
static PyObject *fetch_clnums_by_address_and_type(PyTrace *self, PyObject *args) {
Address address;
char type;
Clnum start_clnum;
Clnum start_clnum, end_clnum;
unsigned int limit;
if (!PyArg_ParseTuple(args, "KcII", &address, &type, &start_clnum, &limit)) { return NULL; }
if (!PyArg_ParseTuple(args, "KcIII", &address, &type, &start_clnum, &end_clnum, &limit)) { return NULL; }
if (self->t == NULL) { return NULL; }
vector<Clnum> ret = self->t->FetchClnumsByAddressAndType(address, type, start_clnum, limit);
vector<Clnum> ret = self->t->FetchClnumsByAddressAndType(address, type, start_clnum, end_clnum, limit);
PyObject *pyret = PyList_New(ret.size());
int i = 0;
@ -125,15 +125,19 @@ static PyObject *fetch_registers(PyTrace *self, PyObject *args) {
static PyObject *get_pmaps(PyTrace *self, PyObject *args) {
if (self->t == NULL) { return NULL; }
set<Address> ip = self->t->GetInstructionPages();
set<Address> dp = self->t->GetDataPages();
map<Address, char> p = self->t->GetPages();
PyObject *iit = PyDict_New();
// no comma allowed in the template
typedef map<Address, char>::iterator p_iter;
FE(p_iter, p, it) {
// eww these strings are long
FE(set<Address>::iterator, dp, it) {
PyDict_SetItem(iit, Py_BuildValue("K", *it), Py_BuildValue("s", "memory"));
if (it->second & PAGE_INSTRUCTION) {
PyDict_SetItem(iit, Py_BuildValue("K", it->first), Py_BuildValue("s", "instruction"));
} else if (it->second & PAGE_WRITE) {
PyDict_SetItem(iit, Py_BuildValue("K", it->first), Py_BuildValue("s", "memory"));
} else if (it->second & PAGE_READ) {
PyDict_SetItem(iit, Py_BuildValue("K", it->first), Py_BuildValue("s", "romemory"));
}
FE(set<Address>::iterator, ip, it) {
PyDict_SetItem(iit, Py_BuildValue("K", *it), Py_BuildValue("s", "instruction"));
}
return iit;
}

7
web/client/controls.js vendored
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@ -96,6 +96,9 @@ $(document).ready(function() {
// registers and other places
$('body').on('click', '.dataromemory', function(e) {
update_dview(e.target.textContent);
});
$('body').on('click', '.datamemory', function(e) {
update_dview(e.target.textContent);
});
@ -113,6 +116,9 @@ $(document).ready(function() {
$('body').on('dblclick', '.hexdumpdatamemory', function(e) {
update_dview(e.target.textContent);
});
$('body').on('dblclick', '.hexdumpdataromemory', function(e) {
update_dview(e.target.textContent);
});
$('body').on('dblclick', '.hexdumpdatainstruction', function(e) {
update_dview(e.target.textContent);
});
@ -121,6 +127,7 @@ $(document).ready(function() {
Session.set("dirtyiaddr", true);
return false;
});
$('body').on('mousedown', '.hexdumpdataromemory', function(e) { return false; });
$('body').on('mousedown', '.hexdumpdatamemory', function(e) { return false; });
$('body').on('mousedown', '.hexdumpdatainstruction', function(e) { return false; });

10
web/client/haddrline.js
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@ -5,13 +5,21 @@ Deps.autorun(function() { DA("pmaps changed, updating haddrline");
if (pmaps === undefined) return;
//p(pmaps);
// eww, numbers. broken for 64-bit
var addrs = Object.keys(pmaps).map(fhex).sort(function(a, b){return a-b});
var addrs = [];
for (k in pmaps) {
// ignore the memory that's only read from
if (pmaps[k] == "romemory") continue;
addrs.push(fhex(k));
}
addrs = addrs.sort(function(a, b){return a-b});
//p(addrs);
// fill in the holes up to 16 pages
var pchunks = [];
for (var i = 0; i < addrs.length;) {
var pchunk = [];
var caddr = addrs[i];
pchunk.push(caddr);
i++;
while ((addrs[i]-caddr) < PAGE_SIZE*8) {

8
web/qira.css
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@ -268,6 +268,10 @@ body {
color: #888800;
}
.dataromemory {
color: #888800;
}
.hexdumpdatainstruction {
color: #CC0000;
}
@ -276,6 +280,10 @@ body {
color: #888800;
}
.hexdumpdataromemory {
color: #888800;
}
.reg {
display: inline-block;
width: 200px;