966f3a3895
Implements setting lp expected when `jalr` is encountered and implements `lpad` instruction of zicfilp. `lpad` instruction is taken out of auipc x0, <imm_20>. This is an existing HINTNOP space. If `lpad` is target of an indirect branch, cpu checks for 20 bit value in x7 upper with 20 bit value embedded in `lpad`. If they don't match, cpu raises a sw check exception with tval = 2. Signed-off-by: Deepak Gupta <debug@rivosinc.com> Co-developed-by: Jim Shu <jim.shu@sifive.com> Co-developed-by: Andy Chiu <andy.chiu@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241008225010.1861630-8-debug@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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trans_privileged.c.inc | ||
trans_rva.c.inc | ||
trans_rvb.c.inc | ||
trans_rvbf16.c.inc | ||
trans_rvd.c.inc | ||
trans_rvf.c.inc | ||
trans_rvh.c.inc | ||
trans_rvi.c.inc | ||
trans_rvk.c.inc | ||
trans_rvm.c.inc | ||
trans_rvv.c.inc | ||
trans_rvvk.c.inc | ||
trans_rvzabha.c.inc | ||
trans_rvzacas.c.inc | ||
trans_rvzawrs.c.inc | ||
trans_rvzce.c.inc | ||
trans_rvzcmop.c.inc | ||
trans_rvzfa.c.inc | ||
trans_rvzfh.c.inc | ||
trans_rvzicbo.c.inc | ||
trans_rvzicond.c.inc | ||
trans_rvzimop.c.inc | ||
trans_svinval.c.inc | ||
trans_xthead.c.inc | ||
trans_xventanacondops.c.inc |