qemu/target at ff7936f0093fab939bf4a8bff316b2cbd7f9f35f - qemu

History

Siarhei Volkau ff7936f009 target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insns

These instructions are part of pool1, see the grand tree above
in the file. Q8ADD is part of pool1 too but belong to another
category of instructions, thus will be made in later patches.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-8-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

2023-07-10 23:33:38 +02:00

alpha

target/alpha: Use float64_to_int64_modulo for CVTTQ

2023-07-01 08:26:54 +02:00

arm

target/arm: Use aesdec_IMC

2023-07-09 13:47:05 +01:00

avr

target/avr: Fix handling of interrupts above 33.

2023-07-08 07:24:38 +03:00

cris

…