qemu/include/hw/misc
Igor Mammedov 533eb415df arm/aspeed: actually check RAM size
It's supposed that SOC will check if "-m" provided
RAM size is valid by setting "ram-size" property and
then board would read back valid (possibly corrected
value) to map RAM MemoryReging with valid size.
It isn't doing so, since check is called only
indirectly from
  aspeed_sdmc_reset()->asc->compute_conf()
or much later when guest writes to configuration
register.

So depending on "-m" value QEMU end-ups with a warning
and an invalid MemoryRegion size allocated and mapped.
(examples:
 -M ast2500-evb -m 1M
    0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container
      0000000080000000-00000000800fffff (prio 0, ram): ram
      0000000080100000-00000000bfffffff (prio 0, i/o): max_ram
 -M ast2500-evb -m 3G
    0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container
      0000000080000000-000000013fffffff (prio 0, ram): ram
      [DETECTED OVERFLOW!] 0000000140000000-00000000bfffffff (prio 0, i/o): max_ram
)
On top of that sdmc falls back and reports to guest
"default" size, it thinks machine should have.

This patch makes ram-size check actually work and
changes behavior from a warning later on during
machine reset to error_fatal at the moment SOC.ram-size
is set so user will have to fix RAM size on CLI
to start machine.

It also gets out of the way mutable ram-size logic,
so we could consolidate RAM allocation logic around
pre-allocated hostmem backend (supplied by user or
auto created by generic machine code depending on
supplied -m/mem-path/mem-prealloc options.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200219160953.13771-10-imammedo@redhat.com>
2020-02-19 16:49:54 +00:00
..
macio include: Make headers more self-contained 2019-08-16 13:31:51 +02:00
a9scu.h
arm11scu.h
arm_integrator_debug.h
armsse-cpuid.h
armsse-mhu.h
aspeed_scu.h hw: aspeed_scu: Add AST2600 support 2019-10-15 18:09:04 +01:00
aspeed_sdmc.h arm/aspeed: actually check RAM size 2020-02-19 16:49:54 +00:00
aspeed_xdma.h
auxbus.h Include hw/qdev-properties.h less 2019-08-16 13:31:53 +02:00
bcm2835_mbox_defs.h
bcm2835_mbox.h
bcm2835_property.h
bcm2835_rng.h
bcm2835_thermal.h hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor 2019-10-25 13:09:27 +01:00
cbus.h Include hw/irq.h a lot less 2019-08-16 13:31:52 +02:00
grlib_ahb_apb_pnp.h
imx2_wdt.h
imx6_ccm.h
imx6_src.h
imx6ul_ccm.h
imx7_ccm.h
imx7_gpr.h
imx7_snvs.h
imx25_ccm.h
imx31_ccm.h
imx_ccm.h
imx_rngc.h i.MX: add an emulation for RNGC 2020-01-17 14:27:16 +00:00
iotkit-secctl.h
iotkit-sysctl.h
iotkit-sysinfo.h
ivshmem.h
mac_via.h q800: add a block backend to the PRAM 2020-01-07 13:35:53 +01:00
mips_cmgcr.h include: Make headers more self-contained 2019-08-16 13:31:51 +02:00
mips_cpc.h include: Make headers more self-contained 2019-08-16 13:31:51 +02:00
mips_itu.h
mos6522.h mos6522: remove anh register 2020-01-08 11:01:59 +11:00
mps2-fpgaio.h
mps2-scc.h
msf2-sysreg.h
nrf51_rng.h
pca9552_regs.h
pca9552.h
pvpanic.h include: Make headers more self-contained 2019-08-16 13:31:51 +02:00
stm32f2xx_syscfg.h Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
stm32f4xx_exti.h hw/misc: Add the STM32F4xx EXTI device 2020-01-17 14:09:29 +00:00
stm32f4xx_syscfg.h hw/misc: Add the STM32F4xx Sysconfig device 2020-01-17 14:09:29 +00:00
tmp105_regs.h
tz-mpc.h
tz-msc.h
tz-ppc.h
unimp.h Include hw/qdev-properties.h less 2019-08-16 13:31:53 +02:00
vmcoreinfo.h Include hw/qdev-properties.h less 2019-08-16 13:31:53 +02:00
zynq-xadc.h