8092b51849
Signed-off-by: Shengtan Mao <stmao@google.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Chris Rauer <crauer@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20211008002628.1958285-2-wuhaotsh@google.com> [rth: Fix typos of "nonexistent"] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/*
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* NPCM7xx SD-3.0 / eMMC-4.51 Host Controller
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*
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* Copyright (c) 2021 Google LLC
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef NPCM7XX_SDHCI_H
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#define NPCM7XX_SDHCI_H
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#include "hw/sd/sdhci.h"
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#include "qom/object.h"
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#define TYPE_NPCM7XX_SDHCI "npcm7xx.sdhci"
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#define NPCM7XX_PRSTVALS_SIZE 6
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#define NPCM7XX_PRSTVALS 0x60
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#define NPCM7XX_PRSTVALS_0 0x0
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#define NPCM7XX_PRSTVALS_1 0x2
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#define NPCM7XX_PRSTVALS_2 0x4
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#define NPCM7XX_PRSTVALS_3 0x6
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#define NPCM7XX_PRSTVALS_4 0x8
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#define NPCM7XX_PRSTVALS_5 0xA
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#define NPCM7XX_BOOTTOCTRL 0x10
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#define NPCM7XX_SDHCI_REGSIZE 0x20
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#define NPCM7XX_PRSNTS_RESET 0x04A00000
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#define NPCM7XX_BLKGAP_RESET 0x80
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#define NPCM7XX_CAPAB_RESET 0x0100200161EE0399
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#define NPCM7XX_MAXCURR_RESET 0x0000000000000005
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#define NPCM7XX_HCVER_RESET 0x1002
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#define NPCM7XX_PRSTVALS_0_RESET 0x0040
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#define NPCM7XX_PRSTVALS_1_RESET 0x0001
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#define NPCM7XX_PRSTVALS_3_RESET 0x0001
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxSDHCIState, NPCM7XX_SDHCI)
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typedef struct NPCM7xxRegs {
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/* Preset Values Register Field, read-only */
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uint16_t prstvals[NPCM7XX_PRSTVALS_SIZE];
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/* Boot Timeout Control Register, read-write */
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uint32_t boottoctrl;
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} NPCM7xxRegisters;
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typedef struct NPCM7xxSDHCIState {
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SysBusDevice parent;
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MemoryRegion container;
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MemoryRegion iomem;
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BusState *bus;
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NPCM7xxRegisters regs;
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SDHCIState sdhci;
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} NPCM7xxSDHCIState;
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#endif /* NPCM7XX_SDHCI_H */
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