qemu/target/riscv/tcg
Deepak Gupta 98f21c30f5 target/riscv: AMO operations always raise store/AMO fault
This patch adds one more word for tcg compile which can be obtained during
unwind time to determine fault type for original operation (example AMO).
Depending on that, fault can be promoted to store/AMO fault.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241008225010.1861630-15-debug@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-30 11:22:08 +10:00
..
meson.build target/riscv: introduce TCG AccelCPUClass 2023-10-12 11:55:21 +10:00
tcg-cpu.c target/riscv: AMO operations always raise store/AMO fault 2024-10-30 11:22:08 +10:00
tcg-cpu.h target/riscv: Implement dynamic establishment of custom decoder 2024-06-03 11:12:12 +10:00