157f75435e
- Fine-grained MAINTAINERS sections - Fix MSA MADDV.B / MSUBV.B opcodes - Convert MSA opcodes to decodetree - Correct Loongson-3A4000 MSAIR register - Do not accept ELF nanoMIPS binaries on linux-user - Use ISA instead of PCI interrupts in VT82C686 PCI device -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmGBP/AACgkQ4+MsLN6t wN71pxAAlzPE8VVJAWP7TLL/Y+j4LhmHZwdkJMyZ1YhHg9loOOzbH+Pm9vgwHzjp O50I+e25LlJfmhR0/UA5nPSGDGQn6yK9bzB31R4ClQaMqyThDysA7HAJnnPQyUOF 9COxd3QdfALn0+0N/Y8uVe8opMAy+pi9G0hIp84ngEXFFph3XZ8GFfdg+ThxhYGG ERQoNqkQpAxWg6Bh1iBH036z6FH8BzFM4Ja6Bm2cjrzLm2PbwOAeFDHJ//961TPK GLTicX3J0xO80X73lF5ipCpyQvo+vCgw/tbSv/I0XS3skMhTHEjucWVBZQ1Awu8e +cK9rRmXMywakMryMUC5C2/8CRNN6FznJYWbnL4TpifqFZ1gmlStKQoHKNKAmrr/ h/plPbyugP2ELdH2gwfjF3uf13Cww2E0vsRJSBuBhSFwb+FEppFUQLykWji2BgyO azB2k3bp6sdLTPhpIWWu1Aq/V3cOq0p2zJip6bS0k8TTQV3q2lLMNc8BF5O0J7Jh KHb6hhqKkEAQhYksyOEsEf+5BtFhiDIfOI3ORu9Zz+L3ffzZlXZjCYgsGsNnGGz1 syoLvrVcdXq7qA4qeocZJ+RSpvvkXpZt0pVBJaw4fenH5XED7GxaQGx9GjhC1UQa VC7mI3D2DUBJACPeUecCJ1MdJfCkAenT5y1bm/w6vqYEF8nLhDE= =XMNZ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/philmd/tags/mips-20211102' into staging MIPS patches queue - Fine-grained MAINTAINERS sections - Fix MSA MADDV.B / MSUBV.B opcodes - Convert MSA opcodes to decodetree - Correct Loongson-3A4000 MSAIR register - Do not accept ELF nanoMIPS binaries on linux-user - Use ISA instead of PCI interrupts in VT82C686 PCI device # gpg: Signature made Tue 02 Nov 2021 09:41:04 AM EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * remotes/philmd/tags/mips-20211102: (41 commits) Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too" hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts usb/uhci: Replace pci_set_irq with qemu_set_irq usb/uhci: Disallow user creating a vt82c686-uhci-pci device usb/uhci: Misc clean up target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU target/mips: Fix Loongson-3A4000 MSAIR config register target/mips: Remove one MSA unnecessary decodetree overlap group target/mips: Remove generic MSA opcode target/mips: Convert CTCMSA opcode to decodetree target/mips: Convert CFCMSA opcode to decodetree target/mips: Convert MSA MOVE.V opcode to decodetree target/mips: Convert MSA COPY_S and INSERT opcodes to decodetree target/mips: Convert MSA COPY_U opcode to decodetree target/mips: Convert MSA ELM instruction format to decodetree target/mips: Convert MSA 3R instruction format to decodetree (part 4/4) target/mips: Convert MSA 3R instruction format to decodetree (part 3/4) target/mips: Convert MSA 3R instruction format to decodetree (part 2/4) target/mips: Convert MSA 3R instruction format to decodetree (part 1/4) target/mips: Convert MSA 3RF instruction format to decodetree (DF_WORD) ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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alpha | ||
arm | ||
avr | ||
cris | ||
hexagon | ||
hppa | ||
i386 | ||
m68k | ||
microblaze | ||
mips | ||
nios2 | ||
openrisc | ||
ppc | ||
riscv | ||
rx | ||
s390x | ||
sh4 | ||
sparc | ||
tricore | ||
xtensa | ||
Kconfig | ||
meson.build |