Paolo Bonzini f8c45c6550 target/i386: use multiple CPU AddressSpaces ... This speeds up SMM switches. Later on it may remove the need to take the BQL, and it may also allow to reuse code between TCG and KVM. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2017-06-07 18:22:02 +02:00
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alpha	target/alpha: Use goto_tb for fallthru between TBs	2017-06-05 09:25:42 -07:00
arm	x86 and machine queue, 2017-06-05	2017-06-06 10:00:34 +01:00
cris	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
hppa	target/hppa: Use tcg_gen_lookup_and_goto_ptr	2017-06-05 09:25:42 -07:00
i386	target/i386: use multiple CPU AddressSpaces	2017-06-07 18:22:02 +02:00
lm32	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
m68k	This is the same as the v3 posted except a re-base and a few extra signoffs	2017-01-16 18:23:02 +00:00
microblaze	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
mips	target/mips: optimize indirect branches	2017-06-05 09:25:42 -07:00
moxie	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
nios2	target/nios2: Fix 64-bit ilp32 compilation	2017-06-05 09:25:42 -07:00
openrisc	target/openrisc: Support non-busy idle state using PMR SPR	2017-05-04 09:39:14 +09:00
ppc	numa: move numa_node from CPUState into target specific classes	2017-06-05 14:59:09 -03:00
s390x	target/s390: Use tcg_gen_lookup_and_goto_ptr	2017-06-05 09:25:42 -07:00
sh4	target/sh4: fix RTE instruction delay slot	2017-05-30 21:00:56 +02:00
sparc	shutdown: Add source information to SHUTDOWN and RESET	2017-05-23 13:28:17 +02:00
tilegx	migration: Remove unneeded includes of migration/vmstate.h	2017-06-01 18:49:22 +02:00
tricore	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
unicore32	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
xtensa	target/xtensa: handle unknown registers in gdbstub	2017-06-06 02:40:48 -07:00