qemu/target/riscv/insn_trans
Richard Henderson f84ed8c2df target/riscv: Move gen_* helpers for RVB
Move these helpers near their use by the trans_*
functions within insn_trans/trans_rvb.c.inc.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823195529.560295-11-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-09-01 11:59:12 +10:00
..
trans_privileged.c.inc riscv: Add semihosting support 2021-01-18 10:05:06 +00:00
trans_rva.c.inc target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr 2021-09-01 11:59:12 +10:00
trans_rvb.c.inc target/riscv: Move gen_* helpers for RVB 2021-09-01 11:59:12 +10:00
trans_rvd.c.inc target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr 2021-09-01 11:59:12 +10:00
trans_rvf.c.inc target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr 2021-09-01 11:59:12 +10:00
trans_rvh.c.inc target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr 2021-09-01 11:59:12 +10:00
trans_rvi.c.inc target/riscv: Add DisasExtend to gen_arith* 2021-09-01 11:59:12 +10:00
trans_rvm.c.inc target/riscv: Move gen_* helpers for RVM 2021-09-01 11:59:12 +10:00
trans_rvv.c.inc target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr 2021-09-01 11:59:12 +10:00