Alex Bennée f80741d107 target/arm: ensure we use current exception state after SCR update ... A write to the SCR can change the effective EL by droppping the system from secure to non-secure mode. However if we use a cached current_el from before the change we'll rebuild the flags incorrectly. To fix this we introduce the ARM_CP_NEWEL CP flag to indicate the new EL should be used when recomputing the flags. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191212114734.6962-1-alex.bennee@linaro.org Cc: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191209143723.6368-1-alex.bennee@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2019-12-16 10:52:58 +00:00
..
a32-uncond.decode	target/arm: Convert Unallocated memory hint	2019-09-05 13:23:03 +01:00
a32.decode	target/arm: Convert SVC	2019-09-05 13:23:03 +01:00
arch_dump.c
arm_ldst.h	target/arm: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
arm-powerctl.c	arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on()	2019-12-16 10:46:35 +00:00
arm-powerctl.h
arm-semi.c	target/arm/arm-semi: Implement SH_EXT_STDOUT_STDERR extension	2019-10-15 18:09:04 +01:00
cpu64.c	target/arm: Add support for DC CVAP & DC CVADP ins	2019-12-16 10:46:35 +00:00
cpu-param.h
cpu-qom.h
cpu.c	target/arm: Add support for cortex-m7 CPU	2019-12-16 10:46:34 +00:00
cpu.h	target/arm: ensure we use current exception state after SCR update	2019-12-16 10:52:58 +00:00
crypto_helper.c
debug_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c	target/arm: Rebuild hflags at EL changes	2019-10-24 17:16:28 +01:00
helper-a64.h
helper-sve.h
helper.c	target/arm: ensure we use current exception state after SCR update	2019-12-16 10:52:58 +00:00
helper.h	target/arm: ensure we use current exception state after SCR update	2019-12-16 10:52:58 +00:00
idau.h
internals.h	target/arm: Split out arm_mmu_idx_el	2019-10-24 17:16:28 +01:00
iwmmxt_helper.c
kvm32.c	target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features	2019-11-01 20:40:59 +00:00
kvm64.c	target/arm/kvm: host cpu: Add support for sve<N> properties	2019-11-01 20:40:59 +00:00
kvm_arm.h	target/arm/cpu64: max cpu: Support sve properties with KVM	2019-11-01 20:40:59 +00:00
kvm-consts.h
kvm-stub.c
kvm.c	target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features	2019-11-01 20:40:59 +00:00
m_helper.c	target/arm: Fix handling of cortex-m FTYPE flag in EXCRET	2019-11-26 13:55:36 +00:00
machine.c	target/arm: Rebuild hflags at EL changes	2019-10-24 17:16:28 +01:00
Makefile.objs	target/arm: Add skeleton for T16 decodetree	2019-09-05 13:23:03 +01:00
monitor.c	target/arm/cpu64: max cpu: Introduce sve<N> properties	2019-11-01 20:40:59 +00:00
neon_helper.c
op_addsub.h
op_helper.c	target/arm: Handle AArch32 CP15 trapping via HSTR_EL2	2019-12-16 10:46:35 +00:00
pauth_helper.c
psci.c
sve_helper.c
sve.decode
t16.decode	target/arm: Convert T16, long branches	2019-09-05 13:23:04 +01:00
t32.decode	target/arm: Convert TT	2019-09-05 13:23:03 +01:00
tlb_helper.c
trace-events
translate-a64.c	target/arm: Rebuild hflags at MSR writes	2019-10-24 17:16:28 +01:00
translate-a64.h	Allow page table bit to swap endianness.	2019-09-04 16:29:18 +01:00
translate-sve.c	tcg: TCGMemOp is now accelerator independent MemOp	2019-09-03 08:30:38 -07:00
translate-vfp.inc.c	target/arm: Handle trapping to EL2 of AArch32 VMRS instructions	2019-12-16 10:46:34 +00:00
translate.c	target/arm: ensure we use current exception state after SCR update	2019-12-16 10:52:58 +00:00
translate.h	target/arm: Handle AArch32 CP15 trapping via HSTR_EL2	2019-12-16 10:46:35 +00:00
vec_helper.c
vfp_helper.c	target/arm: Handle trapping to EL2 of AArch32 VMRS instructions	2019-12-16 10:46:34 +00:00
vfp-uncond.decode
vfp.decode