de77914e50
To get it out of the default GPIO list. This allows child devices to use the un-named GPIO namespace without having to be SSI aware. That is, there is no more need for machines to know about the obscure policy where GPIO 0 is the SSI chip-select and GPIO 1..N are the concrete class GPIOs (defined locally as 0..N-1). This is most notable in stellaris, which uses a device which has both SSI and concrete level GPIOs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
95 lines
3.1 KiB
C
95 lines
3.1 KiB
C
/* QEMU Synchronous Serial Interface support. */
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/* In principle SSI is a point-point interface. As such the qemu
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implementation has a single slave device on a "bus".
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However it is fairly common for boards to have multiple slaves
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connected to a single master, and select devices with an external
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chip select. This is implemented in qemu by having an explicit mux device.
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It is assumed that master and slave are both using the same transfer width.
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*/
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#ifndef QEMU_SSI_H
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#define QEMU_SSI_H
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#include "hw/qdev.h"
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typedef struct SSISlave SSISlave;
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#define TYPE_SSI_SLAVE "ssi-slave"
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#define SSI_SLAVE(obj) \
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OBJECT_CHECK(SSISlave, (obj), TYPE_SSI_SLAVE)
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#define SSI_SLAVE_CLASS(klass) \
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OBJECT_CLASS_CHECK(SSISlaveClass, (klass), TYPE_SSI_SLAVE)
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#define SSI_SLAVE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(SSISlaveClass, (obj), TYPE_SSI_SLAVE)
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#define SSI_GPIO_CS "ssi-gpio-cs"
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typedef enum {
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SSI_CS_NONE = 0,
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SSI_CS_LOW,
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SSI_CS_HIGH,
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} SSICSMode;
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/* Slave devices. */
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typedef struct SSISlaveClass {
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DeviceClass parent_class;
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int (*init)(SSISlave *dev);
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/* if you have standard or no CS behaviour, just override transfer.
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* This is called when the device cs is active (true by default).
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*/
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uint32_t (*transfer)(SSISlave *dev, uint32_t val);
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/* called when the CS line changes. Optional, devices only need to implement
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* this if they have side effects associated with the cs line (beyond
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* tristating the txrx lines).
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*/
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int (*set_cs)(SSISlave *dev, bool select);
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/* define whether or not CS exists and is active low/high */
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SSICSMode cs_polarity;
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/* if you have non-standard CS behaviour override this to take control
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* of the CS behaviour at the device level. transfer, set_cs, and
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* cs_polarity are unused if this is overwritten. Transfer_raw will
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* always be called for the device for every txrx access to the parent bus
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*/
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uint32_t (*transfer_raw)(SSISlave *dev, uint32_t val);
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} SSISlaveClass;
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struct SSISlave {
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DeviceState parent_obj;
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/* Chip select state */
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bool cs;
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};
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#define FROM_SSI_SLAVE(type, dev) DO_UPCAST(type, ssidev, dev)
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extern const VMStateDescription vmstate_ssi_slave;
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#define VMSTATE_SSI_SLAVE(_field, _state) { \
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.name = (stringify(_field)), \
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.size = sizeof(SSISlave), \
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.vmsd = &vmstate_ssi_slave, \
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.flags = VMS_STRUCT, \
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.offset = vmstate_offset_value(_state, _field, SSISlave), \
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}
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DeviceState *ssi_create_slave(SSIBus *bus, const char *name);
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DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name);
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/* Master interface. */
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SSIBus *ssi_create_bus(DeviceState *parent, const char *name);
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uint32_t ssi_transfer(SSIBus *bus, uint32_t val);
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/* Automatically connect all children nodes a spi controller as slaves */
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void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_lines,
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SSIBus *bus);
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/* max111x.c */
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void max111x_set_input(DeviceState *dev, int line, uint8_t value);
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#endif
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