f78fb44e82
Replace op_load_gpr_{T0,T1,T2} and op_store_{T0,T1,T2} with tcg_gen_mov_tl. Introduce TCG variables cpu_gpr[0..31]. For the SPE extension, assure that ppc_gpr_t is only uint64_t for ppc64. Introduce TCG variables cpu_gprh[0..31] for upper 32 bits on ppc and helpers gen_{load,store}_gpr64. Based on suggestions by Aurelien, Thiemo and Blue. Signed-off-by: Andreas Faerber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5153 c046a42c-6fe2-441c-8c8c-71466251a162 |
||
---|---|---|
.. | ||
cpu.h | ||
exec.h | ||
helper_regs.h | ||
helper.c | ||
helper.h | ||
machine.c | ||
mfrom_table_gen.c | ||
mfrom_table.c | ||
op_helper_mem.h | ||
op_helper.c | ||
op_helper.h | ||
op_mem_access.h | ||
op_mem.h | ||
op_template.h | ||
op.c | ||
STATUS | ||
translate_init.c | ||
translate.c |