Peter Crosthwaite f7838b5290 arm: cortex-a9: Fix cache-line size and associativity
For A9, The cache associativity is 4 and the lines size is 32B.
Self identify in CCSIDR accordingly. Cache size remains at 16k.

QEMU doesn't emulate caches, but we should still report the correct
cache-line size to the guest. Some guests (like u-boot) complain if
the cache-line size mismatches a requested flush or invalidate
operation.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1de6bd40155a1d2f2e93e24b1b1d1d677a432641.1408346233.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-08-19 19:02:40 +01:00
2014-06-23 11:00:12 -04:00
2014-07-08 15:08:03 +02:00
2014-08-09 00:06:41 +04:00
2014-08-15 15:07:14 +02:00
2014-08-18 14:39:10 -04:00
2014-08-15 16:37:17 +01:00
2014-08-15 18:54:07 +04:00
2014-08-15 18:44:48 +01:00
2014-06-16 13:24:35 +02:00
2014-06-09 15:43:40 +02:00
2014-07-09 15:50:11 +02:00
2014-08-09 00:06:32 +04:00
2014-07-09 15:50:11 +02:00
2014-06-23 11:12:28 -04:00
2014-08-15 15:07:16 +02:00
2014-08-15 14:49:50 +01:00
2014-08-12 14:26:12 +01:00
2014-08-07 15:09:48 +02:00
2014-06-05 16:10:33 +02:00
2014-07-14 12:03:21 +02:00
2014-06-19 18:44:21 +03:00
2014-06-19 16:41:54 +03:00
2014-08-15 16:37:17 +01:00
2014-08-15 16:37:17 +01:00
2014-06-23 19:09:50 +02:00
2014-08-18 14:39:10 -04:00
2014-06-30 12:50:17 +02:00
2014-08-15 18:44:48 +01:00
2014-08-18 11:59:27 +01:00
2014-08-15 14:49:50 +01:00
2014-07-07 09:15:29 +02:00
2014-06-09 15:43:40 +02:00
2014-08-18 11:59:27 +01:00
2014-08-06 17:53:07 +02:00
2014-08-12 14:29:55 +01:00
2014-06-05 16:10:33 +02:00
2014-08-01 18:30:08 +01:00
2014-08-15 18:54:07 +04:00
2014-08-01 15:57:28 +00:00
2014-07-07 10:37:40 +00:00

Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org

- QEMU team
Description
No description provided
Readme 404 MiB
Languages
C 82.6%
C++ 6.5%
Python 3.4%
Dylan 2.9%
Shell 1.6%
Other 2.8%