qemu/include/hw/i386
Jason Wang d66b969b0d intel_iommu: large page support
Current intel_iommu only supports 4K page which may not be sufficient
to cover guest working set. This patch tries to enable 2M and 1G mapping
for intel_iommu. This is also useful for future device IOTLB
implementation to have a better hit rate.

Major work is adding a page mask field on IOTLB entry to make it
support large page. And also use the slpte level as key to do IOTLB
lookup. MAMV was increased to 18 to support direct invalidation for 1G
mapping.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-02-06 20:44:10 +02:00
..
apic_internal.h cpu/apic: drop icc bus/bridge 2015-10-02 16:22:02 -03:00
apic-msidef.h hw: move headers to include/ 2013-04-08 18:13:10 +02:00
apic.h target-i386: clear bsp bit when designating bsp 2015-04-02 15:57:27 +02:00
ich9.h ich9: implement strap SPKR pin logic 2015-07-08 10:09:55 +03:00
intel_iommu.h intel_iommu: large page support 2016-02-06 20:44:10 +02:00
ioapic_internal.h hmp: added io apic dump state 2015-09-25 12:04:42 +02:00
ioapic.h pc: move IO_APIC_DEFAULT_ADDRESS to include/hw/i386/ioapic.h 2013-07-29 19:33:32 -05:00
pc.h pc: Eliminate PcGuestInfo struct 2016-02-06 20:44:10 +02:00
topology.h cpu: Introduce X86CPUTopoInfo structure for argument simplification 2015-10-02 16:22:01 -03:00