6d2550ea50
See each patch for appropriate Signed-off-by's. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6590 c046a42c-6fe2-441c-8c8c-71466251a162
93 lines
2.2 KiB
Diff
93 lines
2.2 KiB
Diff
qemu: bios: provide gpe _L0x methods (Glauber Costa)
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provide methods for gpe blk 0, even though they do nothing atm
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Signed-off-by: Glauber Costa <gcosta@redhat.com>
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Signed-off-by: Avi Kivity <avi@qumranet.com>
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Index: bochs/bios/acpi-dsdt.dsl
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===================================================================
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--- bochs.orig/bios/acpi-dsdt.dsl
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+++ bochs/bios/acpi-dsdt.dsl
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@@ -597,4 +597,59 @@ DefinitionBlock (
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Zero, /* reserved */
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Zero /* reserved */
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})
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+
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+ Scope (\_GPE)
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+ {
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+ Name(_HID, "ACPI0006")
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+
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+ Method(_L00) {
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+ Return(0x01)
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+ }
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+ Method(_L01) {
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+ Return(0x01)
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+ }
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+ Method(_L02) {
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+ Return(0x01)
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+ }
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+ Method(_L03) {
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+ Return(0x01)
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+ }
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+ Method(_L04) {
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+ Return(0x01)
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+ }
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+ Method(_L05) {
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+ Return(0x01)
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+ }
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+ Method(_L06) {
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+ Return(0x01)
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+ }
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+ Method(_L07) {
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+ Return(0x01)
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+ }
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+ Method(_L08) {
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+ Return(0x01)
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+ }
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+ Method(_L09) {
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+ Return(0x01)
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+ }
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+ Method(_L0A) {
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+ Return(0x01)
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+ }
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+ Method(_L0B) {
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+ Return(0x01)
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+ }
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+ Method(_L0C) {
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+ Return(0x01)
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+ }
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+ Method(_L0D) {
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+ Return(0x01)
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+ }
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+ Method(_L0E) {
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+ Return(0x01)
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+ }
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+ Method(_L0F) {
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+ Return(0x01)
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+ }
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+ }
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+
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}
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Index: bochs/bios/rombios32.c
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===================================================================
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--- bochs.orig/bios/rombios32.c
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+++ bochs/bios/rombios32.c
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@@ -1647,6 +1647,8 @@ void acpi_bios_init(void)
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fadt->pm_tmr_len = 4;
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fadt->plvl2_lat = cpu_to_le16(0xfff); // C2 state not supported
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fadt->plvl3_lat = cpu_to_le16(0xfff); // C3 state not supported
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+ fadt->gpe0_blk = cpu_to_le32(0xafe0);
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+ fadt->gpe0_blk_len = 4;
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/* WBINVD + PROC_C1 + PWR_BUTTON + SLP_BUTTON + FIX_RTC */
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fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 4) | (1 << 5) | (1 << 6));
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acpi_build_table_header((struct acpi_table_header *)fadt, "FACP",
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--
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