f61c3fb56b
'ARM SBCon two-wire serial bus interface' is the official name describing the pair of registers used to bitbanging I2C in the Versatile boards. Make the private VersatileI2CState structure as public ArmSbconI2CState. Add the TYPE_ARM_SBCON_I2C, alias to our current TYPE_VERSATILE_I2C model. Rename the memory region description as 'arm_sbcon_i2c'. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200617072539.32686-5-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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arm_sbcon_i2c.h | ||
aspeed_i2c.h | ||
bitbang_i2c.h | ||
i2c.h | ||
imx_i2c.h | ||
microbit_i2c.h | ||
pm_smbus.h | ||
ppc4xx_i2c.h | ||
smbus_eeprom.h | ||
smbus_master.h | ||
smbus_slave.h |