f5cc5a5c16
i386 is the first user of AccelCPUClass, allowing to split
cpu.c into:
cpu.c cpuid and common x86 cpu functionality
host-cpu.c host x86 cpu functions and "host" cpu type
kvm/kvm-cpu.c KVM x86 AccelCPUClass
hvf/hvf-cpu.c HVF x86 AccelCPUClass
tcg/tcg-cpu.c TCG x86 AccelCPUClass
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio]:
Rebased on commit b8184135 ("target/i386: allow modifying TCG phys-addr-bits")
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210322132800.7470-5-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 lines
515 B
C
20 lines
515 B
C
/*
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* x86 host CPU type initialization and host CPU functions
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*
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* Copyright 2021 SUSE LLC
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef HOST_CPU_H
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#define HOST_CPU_H
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void host_cpu_instance_init(X86CPU *cpu);
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void host_cpu_max_instance_init(X86CPU *cpu);
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void host_cpu_realizefn(CPUState *cs, Error **errp);
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void host_cpu_vendor_fms(char *vendor, int *family, int *model, int *stepping);
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#endif /* HOST_CPU_H */
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