Philippe Mathieu-Daudé 18f86aecd6 target/mips: Fix TX79 LQ/SQ opcodes ... The base register address offset is *signed*. Cc: qemu-stable@nongnu.org Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230914090447.12557-1-philmd@linaro.org>		2023-11-07 12:13:28 +01:00
..
sysemu	hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h'	2023-10-19 23:13:27 +02:00
tcg	target/mips: Fix TX79 LQ/SQ opcodes	2023-11-07 12:13:28 +01:00
cpu-defs.c.inc	hw/mips: spelling fixes	2023-08-31 19:47:43 +02:00
cpu-param.h	target/mips: Remove NB_MMU_MODES define	2023-03-13 06:44:37 -07:00
cpu-qom.h	target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'	2023-11-07 12:13:27 +01:00
cpu.c	accel/tcg: Remove cpu_set_cpustate_pointers	2023-10-04 11:03:54 -07:00
cpu.h	target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'	2023-11-07 12:13:27 +01:00
fpu_helper.h	target/mips: Set set_default_nan_mode with set_snan_bit_is_one	2021-05-16 07:13:51 -05:00
fpu.c	target/mips: Optimize CPU/FPU regnames[] arrays	2021-05-02 16:49:34 +02:00
gdbstub.c	gdbstub: move register helpers into standalone include	2023-03-07 20:44:08 +00:00
helper.h	target/mips: Implement Loongson CSR instructions	2023-07-10 23:33:37 +02:00
internal.h	target/mips: Implement Loongson CSR instructions	2023-07-10 23:33:37 +02:00
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
kvm_mips.h	kvm: Introduce kvm_arch_get_default_type hook	2023-08-22 17:31:02 +01:00
kvm.c	mips: Report an error when KVM_VM_MIPS_VZ is unavailable	2023-08-22 17:31:03 +01:00
meson.build	meson: Rename target_softmmu_arch -> target_system_arch	2023-10-07 19:03:07 +02:00
mips-defs.h	target/mips: introduce decodetree structure for Cavium Octeon extension	2022-07-12 22:30:09 +02:00
msa.c	target/mips: Move msa_reset() to new source file	2021-05-02 16:49:34 +02:00