966f3a3895
Implements setting lp expected when `jalr` is encountered and implements `lpad` instruction of zicfilp. `lpad` instruction is taken out of auipc x0, <imm_20>. This is an existing HINTNOP space. If `lpad` is target of an indirect branch, cpu checks for 20 bit value in x7 upper with 20 bit value embedded in `lpad`. If they don't match, cpu raises a sw check exception with tval = 2. Signed-off-by: Deepak Gupta <debug@rivosinc.com> Co-developed-by: Jim Shu <jim.shu@sifive.com> Co-developed-by: Andy Chiu <andy.chiu@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241008225010.1861630-8-debug@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
21 lines
498 B
C
21 lines
498 B
C
#ifndef TARGET_RISCV_CPU_USER_H
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#define TARGET_RISCV_CPU_USER_H
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#define xRA 1 /* return address (aka link register) */
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#define xSP 2 /* stack pointer */
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#define xGP 3 /* global pointer */
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#define xTP 4 /* thread pointer */
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#define xA0 10 /* gpr[10-17] are syscall arguments */
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#define xA1 11
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#define xA2 12
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#define xA3 13
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#define xA4 14
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#define xA5 15
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#define xA6 16
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#define xA7 17 /* syscall number for RVI ABI */
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#define xT0 5 /* syscall number for RVE ABI */
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#define xT2 7
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#endif
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