cf5ec6641e
F16C only consists of two instructions, which are a bit peculiar nevertheless. First, they access only the low half of an YMM or XMM register for the packed-half operand; the exact size still depends on the VEX.L flag. This is similar to the existing avx_movx flag, but not exactly because avx_movx is hardcoded to affect operand 2. To this end I added a "ph" format name; it's possible to reuse this approach for the VPMOVSX and VPMOVZX instructions, though that would also require adding two more formats for the low-quarter and low-eighth of an operand. Second, VCVTPS2PH is somewhat weird because it *stores* the result of the instruction into memory rather than loading it. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
365 lines
8.7 KiB
C
365 lines
8.7 KiB
C
#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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typedef void (*testfn)(void);
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typedef struct {
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uint64_t q0, q1, q2, q3;
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} __attribute__((aligned(32))) v4di;
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typedef struct {
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uint64_t mm[8];
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v4di ymm[16];
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uint64_t r[16];
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uint64_t flags;
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uint32_t ff;
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uint64_t pad;
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v4di mem[4];
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v4di mem0[4];
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} reg_state;
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typedef struct {
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int n;
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testfn fn;
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const char *s;
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reg_state *init;
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} TestDef;
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reg_state initI;
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reg_state initF16;
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reg_state initF32;
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reg_state initF64;
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static void dump_ymm(const char *name, int n, const v4di *r, int ff)
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{
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printf("%s%d = %016lx %016lx %016lx %016lx\n",
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name, n, r->q3, r->q2, r->q1, r->q0);
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if (ff == 64) {
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double v[4];
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memcpy(v, r, sizeof(v));
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printf(" %16g %16g %16g %16g\n",
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v[3], v[2], v[1], v[0]);
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} else if (ff == 32) {
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float v[8];
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memcpy(v, r, sizeof(v));
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printf(" %8g %8g %8g %8g %8g %8g %8g %8g\n",
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v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
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}
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}
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static void dump_regs(reg_state *s)
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{
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int i;
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for (i = 0; i < 16; i++) {
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dump_ymm("ymm", i, &s->ymm[i], 0);
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}
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for (i = 0; i < 4; i++) {
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dump_ymm("mem", i, &s->mem0[i], 0);
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}
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}
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static void compare_state(const reg_state *a, const reg_state *b)
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{
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int i;
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for (i = 0; i < 8; i++) {
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if (a->mm[i] != b->mm[i]) {
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printf("MM%d = %016lx\n", i, b->mm[i]);
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}
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}
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for (i = 0; i < 16; i++) {
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if (a->r[i] != b->r[i]) {
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printf("r%d = %016lx\n", i, b->r[i]);
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}
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}
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for (i = 0; i < 16; i++) {
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if (memcmp(&a->ymm[i], &b->ymm[i], 32)) {
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dump_ymm("ymm", i, &b->ymm[i], a->ff);
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}
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}
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for (i = 0; i < 4; i++) {
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if (memcmp(&a->mem0[i], &a->mem[i], 32)) {
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dump_ymm("mem", i, &a->mem[i], a->ff);
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}
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}
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if (a->flags != b->flags) {
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printf("FLAGS = %016lx\n", b->flags);
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}
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}
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#define LOADMM(r, o) "movq " #r ", " #o "[%0]\n\t"
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#define LOADYMM(r, o) "vmovdqa " #r ", " #o "[%0]\n\t"
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#define STOREMM(r, o) "movq " #o "[%1], " #r "\n\t"
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#define STOREYMM(r, o) "vmovdqa " #o "[%1], " #r "\n\t"
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#define MMREG(F) \
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F(mm0, 0x00) \
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F(mm1, 0x08) \
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F(mm2, 0x10) \
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F(mm3, 0x18) \
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F(mm4, 0x20) \
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F(mm5, 0x28) \
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F(mm6, 0x30) \
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F(mm7, 0x38)
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#define YMMREG(F) \
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F(ymm0, 0x040) \
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F(ymm1, 0x060) \
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F(ymm2, 0x080) \
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F(ymm3, 0x0a0) \
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F(ymm4, 0x0c0) \
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F(ymm5, 0x0e0) \
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F(ymm6, 0x100) \
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F(ymm7, 0x120) \
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F(ymm8, 0x140) \
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F(ymm9, 0x160) \
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F(ymm10, 0x180) \
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F(ymm11, 0x1a0) \
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F(ymm12, 0x1c0) \
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F(ymm13, 0x1e0) \
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F(ymm14, 0x200) \
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F(ymm15, 0x220)
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#define LOADREG(r, o) "mov " #r ", " #o "[rax]\n\t"
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#define STOREREG(r, o) "mov " #o "[rax], " #r "\n\t"
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#define REG(F) \
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F(rbx, 0x248) \
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F(rcx, 0x250) \
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F(rdx, 0x258) \
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F(rsi, 0x260) \
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F(rdi, 0x268) \
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F(r8, 0x280) \
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F(r9, 0x288) \
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F(r10, 0x290) \
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F(r11, 0x298) \
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F(r12, 0x2a0) \
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F(r13, 0x2a8) \
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F(r14, 0x2b0) \
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F(r15, 0x2b8) \
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static void run_test(const TestDef *t)
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{
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reg_state result;
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reg_state *init = t->init;
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memcpy(init->mem, init->mem0, sizeof(init->mem));
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printf("%5d %s\n", t->n, t->s);
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asm volatile(
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MMREG(LOADMM)
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YMMREG(LOADYMM)
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"sub rsp, 128\n\t"
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"push rax\n\t"
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"push rbx\n\t"
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"push rcx\n\t"
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"push rdx\n\t"
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"push %1\n\t"
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"push %2\n\t"
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"mov rax, %0\n\t"
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"pushf\n\t"
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"pop rbx\n\t"
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"shr rbx, 8\n\t"
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"shl rbx, 8\n\t"
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"mov rcx, 0x2c0[rax]\n\t"
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"and rcx, 0xff\n\t"
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"or rbx, rcx\n\t"
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"push rbx\n\t"
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"popf\n\t"
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REG(LOADREG)
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"mov rax, 0x240[rax]\n\t"
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"call [rsp]\n\t"
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"mov [rsp], rax\n\t"
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"mov rax, 8[rsp]\n\t"
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REG(STOREREG)
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"mov rbx, [rsp]\n\t"
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"mov 0x240[rax], rbx\n\t"
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"mov rbx, 0\n\t"
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"mov 0x270[rax], rbx\n\t"
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"mov 0x278[rax], rbx\n\t"
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"pushf\n\t"
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"pop rbx\n\t"
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"and rbx, 0xff\n\t"
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"mov 0x2c0[rax], rbx\n\t"
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"add rsp, 16\n\t"
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"pop rdx\n\t"
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"pop rcx\n\t"
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"pop rbx\n\t"
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"pop rax\n\t"
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"add rsp, 128\n\t"
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MMREG(STOREMM)
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YMMREG(STOREYMM)
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: : "r"(init), "r"(&result), "r"(t->fn)
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: "memory", "cc",
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"rsi", "rdi",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
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"ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5",
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"ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11",
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"ymm12", "ymm13", "ymm14", "ymm15"
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);
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compare_state(init, &result);
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}
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#define TEST(n, cmd, type) \
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static void __attribute__((naked)) test_##n(void) \
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{ \
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asm volatile(cmd); \
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asm volatile("ret"); \
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}
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#include "test-avx.h"
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static const TestDef test_table[] = {
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#define TEST(n, cmd, type) {n, test_##n, cmd, &init##type},
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#include "test-avx.h"
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{-1, NULL, "", NULL}
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};
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static void run_all(void)
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{
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const TestDef *t;
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for (t = test_table; t->fn; t++) {
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run_test(t);
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}
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}
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#define ARRAY_LEN(x) (sizeof(x) / sizeof(x[0]))
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uint16_t val_f16[] = { 0x4000, 0xbc00, 0x44cd, 0x3a66, 0x4200, 0x7a1a, 0x4780, 0x4826 };
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float val_f32[] = {2.0, -1.0, 4.8, 0.8, 3, -42.0, 5e6, 7.5, 8.3};
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double val_f64[] = {2.0, -1.0, 4.8, 0.8, 3, -42.0, 5e6, 7.5};
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v4di val_i64[] = {
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{0x3d6b3b6a9e4118f2lu, 0x355ae76d2774d78clu,
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0xac3ff76c4daa4b28lu, 0xe7fabd204cb54083lu},
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{0xd851c54a56bf1f29lu, 0x4a84d1d50bf4c4fflu,
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0x56621e553d52b56clu, 0xd0069553da8f584alu},
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{0x5826475e2c5fd799lu, 0xfd32edc01243f5e9lu,
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0x738ba2c66d3fe126lu, 0x5707219c6e6c26b4lu},
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};
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v4di deadbeef = {0xa5a5a5a5deadbeefull, 0xa5a5a5a5deadbeefull,
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0xa5a5a5a5deadbeefull, 0xa5a5a5a5deadbeefull};
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v4di indexq = {0x000000000000001full, 0x000000000000008full,
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0xffffffffffffffffull, 0xffffffffffffff5full};
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v4di indexd = {0x00000002000000efull, 0xfffffff500000010ull,
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0x0000000afffffff0ull, 0x000000000000000eull};
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v4di gather_mem[0x20];
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void init_f16reg(v4di *r)
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{
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memset(r, 0, sizeof(*r));
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memcpy(r, val_f16, sizeof(val_f16));
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}
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void init_f32reg(v4di *r)
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{
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static int n;
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float v[8];
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int i;
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for (i = 0; i < 8; i++) {
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v[i] = val_f32[n++];
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if (n == ARRAY_LEN(val_f32)) {
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n = 0;
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}
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}
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memcpy(r, v, sizeof(*r));
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}
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void init_f64reg(v4di *r)
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{
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static int n;
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double v[4];
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int i;
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for (i = 0; i < 4; i++) {
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v[i] = val_f64[n++];
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if (n == ARRAY_LEN(val_f64)) {
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n = 0;
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}
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}
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memcpy(r, v, sizeof(*r));
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}
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void init_intreg(v4di *r)
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{
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static uint64_t mask;
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static int n;
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r->q0 = val_i64[n].q0 ^ mask;
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r->q1 = val_i64[n].q1 ^ mask;
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r->q2 = val_i64[n].q2 ^ mask;
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r->q3 = val_i64[n].q3 ^ mask;
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n++;
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if (n == ARRAY_LEN(val_i64)) {
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n = 0;
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mask *= 0x104C11DB7;
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}
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}
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static void init_all(reg_state *s)
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{
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int i;
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s->r[3] = (uint64_t)&s->mem[0]; /* rdx */
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s->r[4] = (uint64_t)&gather_mem[ARRAY_LEN(gather_mem) / 2]; /* rsi */
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s->r[5] = (uint64_t)&s->mem[2]; /* rdi */
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s->flags = 2;
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for (i = 0; i < 16; i++) {
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s->ymm[i] = deadbeef;
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}
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s->ymm[13] = indexd;
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s->ymm[14] = indexq;
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for (i = 0; i < 4; i++) {
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s->mem0[i] = deadbeef;
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}
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}
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int main(int argc, char *argv[])
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{
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int i;
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init_all(&initI);
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init_intreg(&initI.ymm[10]);
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init_intreg(&initI.ymm[11]);
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init_intreg(&initI.ymm[12]);
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init_intreg(&initI.mem0[1]);
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printf("Int:\n");
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dump_regs(&initI);
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init_all(&initF16);
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init_f16reg(&initF16.ymm[10]);
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init_f16reg(&initF16.ymm[11]);
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init_f16reg(&initF16.ymm[12]);
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init_f16reg(&initF16.mem0[1]);
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initF16.ff = 16;
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printf("F16:\n");
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dump_regs(&initF16);
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init_all(&initF32);
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init_f32reg(&initF32.ymm[10]);
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init_f32reg(&initF32.ymm[11]);
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init_f32reg(&initF32.ymm[12]);
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init_f32reg(&initF32.mem0[1]);
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initF32.ff = 32;
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printf("F32:\n");
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dump_regs(&initF32);
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init_all(&initF64);
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init_f64reg(&initF64.ymm[10]);
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init_f64reg(&initF64.ymm[11]);
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init_f64reg(&initF64.ymm[12]);
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init_f64reg(&initF64.mem0[1]);
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initF64.ff = 64;
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printf("F64:\n");
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dump_regs(&initF64);
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for (i = 0; i < ARRAY_LEN(gather_mem); i++) {
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init_intreg(&gather_mem[i]);
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}
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if (argc > 1) {
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int n = atoi(argv[1]);
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run_test(&test_table[n]);
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} else {
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run_all();
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}
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return 0;
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}
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