qemu/include/hw/cxl
Fan Ni e4180db4e6 hw/mem/cxl_type3: Add DPA range validation for accesses to DC regions
All DPA ranges in the DC regions are invalid to access until an extent
covering the range has been successfully accepted by the host. A bitmap
is added to each region to record whether a DC block in the region has
been backed by a DC extent. Each bit in the bitmap represents a DC block.
When a DC extent is accepted, all the bits representing the blocks in the
extent are set, which will be cleared when the extent is released.

Tested-by: Svetly Todorov <svetly.todorov@memverge.com>
Reviewed-by: Gregory Price <gregory.price@memverge.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Fan Ni <fan.ni@samsung.com>
Message-Id: <20240523174651.1089554-13-nifan.cxl@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-07-01 17:16:04 -04:00
..
cxl_cdat.h hw/mem/cxl_type3: Fix problem with g_steal_pointer() 2024-03-09 18:56:37 +03:00
cxl_component.h hw/cxl/cxl-cdat: Make cxl_doe_cdat_init() return boolean 2024-04-25 12:48:12 +02:00
cxl_device.h hw/mem/cxl_type3: Add DPA range validation for accesses to DC regions 2024-07-01 17:16:04 -04:00
cxl_events.h hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents 2024-07-01 17:16:04 -04:00
cxl_host.h hw/cxl: Clean up includes 2023-02-08 07:16:23 +01:00
cxl_pci.h hw/cxl: Fix missing reserved data in CXL Device DVSEC 2024-03-12 17:59:48 -04:00
cxl.h hw/cxl/mbox: Add Physical Switch Identify command. 2023-11-07 03:39:11 -05:00