e84f176844
The exception return address for nios2 is the instruction after the one that was executing at the time of the exception. We have so far implemented this by advancing the pc during the process of raising the exception. It is perhaps a little less confusing to do this advance in the translator (and helpers) when raising the exception in the first place, so that we may more closely match kernel sources. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-58-richard.henderson@linaro.org>
121 lines
3.5 KiB
C
121 lines
3.5 KiB
C
/*
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* Altera Nios II helper routines.
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*
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* Copyright (C) 2012 Chris Wulff <crwulff@gmail.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "qemu/main-loop.h"
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void helper_raise_exception(CPUNios2State *env, uint32_t index)
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{
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CPUState *cs = env_cpu(env);
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cs->exception_index = index;
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cpu_loop_exit(cs);
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}
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void nios2_cpu_loop_exit_advance(CPUNios2State *env, uintptr_t retaddr)
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{
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CPUState *cs = env_cpu(env);
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/*
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* Note that PC is advanced for all hardware exceptions.
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* Do this here, rather than in restore_state_to_opc(),
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* lest we affect QEMU internal exceptions, like EXCP_DEBUG.
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*/
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cpu_restore_state(cs, retaddr, true);
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env->pc += 4;
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cpu_loop_exit(cs);
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}
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static void maybe_raise_div(CPUNios2State *env, uintptr_t ra)
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{
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Nios2CPU *cpu = env_archcpu(env);
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CPUState *cs = env_cpu(env);
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if (cpu->diverr_present) {
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cs->exception_index = EXCP_DIV;
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nios2_cpu_loop_exit_advance(env, ra);
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}
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}
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int32_t helper_divs(CPUNios2State *env, int32_t num, int32_t den)
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{
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if (unlikely(den == 0) || unlikely(den == -1 && num == INT32_MIN)) {
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maybe_raise_div(env, GETPC());
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return num; /* undefined */
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}
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return num / den;
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}
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uint32_t helper_divu(CPUNios2State *env, uint32_t num, uint32_t den)
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{
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if (unlikely(den == 0)) {
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maybe_raise_div(env, GETPC());
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return num; /* undefined */
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}
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return num / den;
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}
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#ifndef CONFIG_USER_ONLY
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void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc)
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{
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Nios2CPU *cpu = env_archcpu(env);
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CPUState *cs = env_cpu(env);
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if (unlikely(new_pc & 3)) {
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env->ctrl[CR_BADADDR] = new_pc;
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cs->exception_index = EXCP_UNALIGND;
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nios2_cpu_loop_exit_advance(env, GETPC());
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}
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/*
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* None of estatus, bstatus, or sstatus have constraints on write;
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* do not allow reserved fields in status to be set.
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* When shadow registers are enabled, eret *does* restore CRS.
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* Rather than testing eic_present to decide, mask CRS out of
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* the set of readonly fields.
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*/
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new_status &= cpu->cr_state[CR_STATUS].writable |
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(cpu->cr_state[CR_STATUS].readonly & R_CR_STATUS_CRS_MASK);
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env->ctrl[CR_STATUS] = new_status;
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env->pc = new_pc;
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nios2_update_crs(env);
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cpu_loop_exit(cs);
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}
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/*
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* RDPRS and WRPRS are implemented out of line so that if PRS == CRS,
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* all of the tcg global temporaries are synced back to ENV.
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*/
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uint32_t helper_rdprs(CPUNios2State *env, uint32_t regno)
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{
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unsigned prs = FIELD_EX32(env->ctrl[CR_STATUS], CR_STATUS, PRS);
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return env->shadow_regs[prs][regno];
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}
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void helper_wrprs(CPUNios2State *env, uint32_t regno, uint32_t val)
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{
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unsigned prs = FIELD_EX32(env->ctrl[CR_STATUS], CR_STATUS, PRS);
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env->shadow_regs[prs][regno] = val;
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}
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#endif /* !CONFIG_USER_ONLY */
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