qemu/target-openrisc
Andreas Färber a0e372f0c4 cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs
CPUState::gdb_num_regs replaces num_g_regs.
CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.

Allows building gdb_register_coprocessor() for xtensa, too.

As a side effect this should fix coprocessor register numbering for SMP.

Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26 23:23:54 +02:00
..
cpu.c cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs 2013-07-26 23:23:54 +02:00
cpu.h cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook 2013-07-23 02:41:33 +02:00
exception_helper.c target-openrisc: Clean up triple QOM casts 2013-01-27 14:34:26 +01:00
exception.c target-or32: Add exception support 2012-07-27 21:12:58 +00:00
exception.h target-or32: Add exception support 2012-07-27 21:12:58 +00:00
fpu_helper.c target-openrisc: Clean up triple QOM casts 2013-01-27 14:34:26 +01:00
helper.h exec: move include files to include/exec/ 2012-12-19 08:31:31 +01:00
int_helper.c target-openrisc: Clean up triple QOM casts 2013-01-27 14:34:26 +01:00
interrupt_helper.c cpu: Move halted and interrupt_request fields to CPUState 2013-03-12 10:35:55 +01:00
interrupt.c cpu: Replace do_interrupt() by CPUClass::do_interrupt method 2013-03-12 10:35:55 +01:00
machine.c target-openrisc: Register VMStateDescription for OpenRISCCPU 2013-06-28 13:25:12 +02:00
Makefile.objs target-or32: Add system instructions 2012-07-27 21:13:03 +00:00
mmu_helper.c exec: move include files to include/exec/ 2012-12-19 08:31:31 +01:00
mmu.c cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook 2013-07-23 02:41:33 +02:00
sys_helper.c cpu: Move halted and interrupt_request fields to CPUState 2013-03-12 10:35:55 +01:00
translate.c cpu: Move singlestep_enabled field from CPU_COMMON to CPUState 2013-07-23 02:41:32 +02:00