qemu/target
Palmer Dabbelt f17e02cd37
target/riscv: Zero extend the inputs of divuw and remuw
While running the GCC test suite against 4.0.0-rc0, Kito found a
regression introduced by the decodetree conversion that caused divuw and
remuw to sign-extend their inputs.  The ISA manual says they are
supposed to be zero extended:

    DIVW and DIVUW instructions are only valid for RV64, and divide the
    lower 32 bits of rs1 by the lower 32 bits of rs2, treating them as
    signed and unsigned integers respectively, placing the 32-bit
    quotient in rd, sign-extended to 64 bits. REMW and REMUW
    instructions are only valid for RV64, and provide the corresponding
    signed and unsigned remainder operations respectively.  Both REMW
    and REMUW always sign-extend the 32-bit result to 64 bits, including
    on a divide by zero.

Here's Kito's reduced test case from the GCC test suite

    unsigned calc_mp(unsigned mod)
    {
         unsigned a,b,c;
         c=-1;
         a=c/mod;
         b=0-a*mod;
         if (b > mod) { a += 1; b-=mod; }
         return b;
    }

    int main(int argc, char *argv[])
    {
         unsigned x = 1234;
         unsigned y = calc_mp(x);

         if ((sizeof (y) == 4 && y != 680)
      || (sizeof (y) == 2 && y != 134))
    abort ();
         exit (0);
    }

I haven't done any other testing on this, but it does fix the test case.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-22 00:26:39 -07:00
..
alpha avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
arm target/arm: Check access permission to ADDVL/ADDPL/RDVL 2019-03-15 11:12:29 +00:00
cris avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
hppa target/hppa: Avoid squishing DISAS_IAQ_N_STALE_EXIT 2019-03-15 10:09:55 -07:00
i386 i386: extended the cpuid_level when Intel PT is enabled 2019-03-11 16:33:49 +01:00
lm32 tcg-next queue 2018-06-04 11:28:31 +01:00
m68k target/m68k: Fix LGPL information in the file headers 2019-01-30 14:20:13 +01:00
microblaze target/microblaze: Add props enabling exceptions on failed bus accesses 2019-01-22 03:17:34 -08:00
mips target/mips: Preparing for adding MMI instructions 2019-02-27 14:26:14 +01:00
moxie target/moxie: Fix LGPL information in the file headers 2019-02-06 15:46:11 +01:00
nios2 tcg-next queue 2018-06-04 11:28:31 +01:00
openrisc target/openrisc: Fix LGPL version number 2019-01-30 11:01:36 +01:00
ppc spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
riscv target/riscv: Zero extend the inputs of divuw and remuw 2019-03-22 00:26:39 -07:00
s390x s390x/tcg: Implement VECTOR UNPACK * 2019-03-11 09:31:01 +01:00
sh4 sh4: fix use_icount with linux-user 2018-08-20 00:11:06 +02:00
sparc qdev-props: remove errp from GlobalProperty 2019-01-07 16:18:42 +04:00
tilegx avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
tricore tricore: fixed RCR_CADDN instruction 2019-03-08 10:00:59 +01:00
unicore32 target/unicore32: remove tlb_flush from uc32_init_fn 2018-10-18 18:58:10 -07:00
xtensa target/xtensa: implement PREFCTL SR 2019-02-28 04:43:22 -08:00