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qemu/target-xtensa
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Max Filippov f14c4b5fb1 target-xtensa: add DBREAK data breakpoints 
Add DBREAKA/DBREAKC SRs and implement DBREAK breakpoints as debug
watchpoints.

This implementation is not fully compliant to ISA: when a breakpoint is
set to an unmapped/inaccessible memory address it generates TLB/memory
protection exception instead of debug exception.

See ISA, 4.7.7.3, 4.7.7.6 for more details.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-02-20 20:07:12 +04:00
..
core-dc232b target-xtensa: add dc232b core 2011-10-16 10:40:02 +00:00
core-fsf target-xtensa: add fsf core 2011-10-16 10:40:16 +00:00
core-dc232b.c target-xtensa: add dc232b core 2011-10-16 10:40:02 +00:00
core-fsf.c target-xtensa: add fsf core 2011-10-16 10:40:16 +00:00
cpu.h target-xtensa: add DBREAK data breakpoints 2012-02-20 20:07:12 +04:00
helper.c target-xtensa: add DBREAK data breakpoints 2012-02-20 20:07:12 +04:00
helpers.h target-xtensa: add DBREAK data breakpoints 2012-02-20 20:07:12 +04:00
machine.c target-xtensa: add target stubs 2011-09-10 16:57:36 +00:00
op_helper.c target-xtensa: add DBREAK data breakpoints 2012-02-20 20:07:12 +04:00
overlay_tool.h target-xtensa: define TLB_TEMPLATE for MMU-less cores 2012-02-18 01:25:27 +04:00
translate.c target-xtensa: add DBREAK data breakpoints 2012-02-20 20:07:12 +04:00