f0a902f764
With quad Cortex-A53 CPUs. Use SMC PSCI, with the standard policy of secondaries starting in power-off. Tested-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a16202a6c7b79e446e5289d38cb18d2ee4b897a0.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
39 lines
1.1 KiB
C
39 lines
1.1 KiB
C
/*
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* Xilinx Zynq MPSoC emulation
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*
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* Copyright (C) 2015 Xilinx Inc
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* Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef XLNX_ZYNQMP_H
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#include "qemu-common.h"
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#include "hw/arm/arm.h"
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#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
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#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
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TYPE_XLNX_ZYNQMP)
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#define XLNX_ZYNQMP_NUM_CPUS 4
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typedef struct XlnxZynqMPState {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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ARMCPU cpu[XLNX_ZYNQMP_NUM_CPUS];
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} XlnxZynqMPState;
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#define XLNX_ZYNQMP_H
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#endif
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