qemu/target at f0a2171bf9f35b0430e18676a688b2c985f8917a - qemu

History

Aaron Lindsay e4e91a217c target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide

This is a bug fix to ensure 64-bit reads of these registers don't read
adjacent data.

Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org>
Message-id: 1523997485-1905-13-git-send-email-alindsay@codeaurora.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2018-04-26 11:04:39 +01:00

alpha

icount: fix cpu_restore_state_from_tb for non-tb-exit cases

2018-04-11 09:05:22 +10:00

arm

target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide

2018-04-26 11:04:39 +01:00

cris

icount: fix cpu_restore_state_from_tb for non-tb-exit cases

2018-04-11 09:05:22 +10:00

hppa

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