Richard Henderson 2da8a6bcdc target/ppc: Validate hflags with CONFIG_DEBUG_TCG ...

Verify that hflags was updated correctly whenever we change
cpu state that is used by hflags.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323184340.619757-11-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

2021-05-04 11:41:25 +10:00

..

alpha

target/alpha: fix icount handling for timer instructions

2021-04-05 07:32:56 -07:00

arm

target/arm: Enforce alignment for sve LD1R

2021-04-30 11:16:51 +01:00

avr

target/avr: Fix interrupt execution

2021-03-15 00:39:52 +01:00

cris

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hexagon

Hexagon (target/hexagon) CABAC decode bin

2021-05-01 16:06:11 -07:00

hppa

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i386

i386: Add missing cpu feature bits in EPYC-Rome model

2021-04-09 16:02:18 -04:00

lm32

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m68k

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microblaze

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mips

target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)

2021-04-20 12:52:04 +01:00

moxie

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nios2

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openrisc

target/openrisc: fix icount handling for timer instructions

2021-04-01 10:37:20 +02:00

ppc

target/ppc: Validate hflags with CONFIG_DEBUG_TCG

2021-05-04 11:41:25 +10:00

riscv

target/riscv: Prevent lost illegal instruction exceptions

2021-03-22 21:54:40 -04:00

rx

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s390x

target/s390x: fix s390_probe_access to check PAGE_WRITE_ORG for writeability

2021-04-23 14:10:56 +01:00

sh4

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sparc

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tricore

target/tricore: Fix OPC2_32_RRPW_EXTR for width=0

2021-03-14 14:49:01 +01:00

unicore32

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xtensa

target/xtensa: make xtensa_modules static on import

2021-04-03 08:52:18 -07:00

meson.build

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