ef10aebb9a
Move the check for valid memory sizes from board to sdram controller init. This adds the missing valid memory sizes of 16 and 8 MiB to the DoC and the board now only checks for additional restrictions imposed by its firmware then sdram init checks for valid sizes for SoC. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <41da3797392acaacc7963b79512c8af8005fa4b0.1664021647.git.balaton@eik.bme.hu> [danielhb: avoid 4*GiB size due to 32 bit build problems] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
26 lines
646 B
C
26 lines
646 B
C
/*
|
|
* QEMU PowerPC 440 shared definitions
|
|
*
|
|
* Copyright (c) 2012 François Revol
|
|
* Copyright (c) 2016-2018 BALATON Zoltan
|
|
*
|
|
* This work is licensed under the GNU GPL license version 2 or later.
|
|
*
|
|
*/
|
|
|
|
#ifndef PPC440_H
|
|
#define PPC440_H
|
|
|
|
#include "hw/ppc/ppc.h"
|
|
|
|
void ppc4xx_l2sram_init(CPUPPCState *env);
|
|
void ppc4xx_cpr_init(CPUPPCState *env);
|
|
void ppc4xx_sdr_init(CPUPPCState *env);
|
|
void ppc440_sdram_init(CPUPPCState *env, int nbanks,
|
|
MemoryRegion *ram);
|
|
void ppc4xx_ahb_init(CPUPPCState *env);
|
|
void ppc4xx_dma_init(CPUPPCState *env, int dcr_base);
|
|
void ppc460ex_pcie_init(CPUPPCState *env);
|
|
|
|
#endif /* PPC440_H */
|