Alistair Francis fe0fe4735e riscv: Initial commit of OpenTitan machine ...

This adds a barebone OpenTitan machine to QEMU.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>

2020-06-03 09:11:51 -07:00

..

boot.c

riscv: Change the default behavior if no -bios option is specified

2020-06-03 09:11:51 -07:00

Kconfig

riscv: Initial commit of OpenTitan machine

2020-06-03 09:11:51 -07:00

Makefile.objs

riscv: Initial commit of OpenTitan machine

2020-06-03 09:11:51 -07:00

opentitan.c

riscv: Initial commit of OpenTitan machine

2020-06-03 09:11:51 -07:00

riscv_hart.c

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riscv_htif.c

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sifive_clint.c

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sifive_e_prci.c

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sifive_e.c

riscv: sifive_e: Manually define the machine

2020-06-03 09:11:51 -07:00

sifive_gpio.c

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sifive_plic.c

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sifive_test.c

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sifive_u_otp.c

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sifive_u_prci.c

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sifive_u.c

hw/riscv: sifive_u: Remove the riscv_ prefix of the soc* functions

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sifive_uart.c

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spike.c

hw/riscv: spike: Remove deprecated ISA specific machines

2020-06-03 09:11:51 -07:00

trace-events

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virt.c

hw/riscv: virt: Remove the riscv_ prefix of the machine* functions

2020-06-03 09:11:51 -07:00