qemu/disas
Mikhail Tyutin 0d581506de Fix incorrect register name in disassembler for fmv,fabs,fneg instructions
Fix incorrect register name in RISC-V disassembler for fmv,fabs,fneg instructions

Signed-off-by: Mikhail Tyutin <m.tyutin@yadro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <3454991f-7f64-24c3-9a36-f5fa2cc389e1@yadro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-03-14 16:36:43 +10:00
..
alpha.c
capstone.c disas: use result of ->read_memory_func 2022-10-06 11:53:40 +01:00
cris.c
hexagon.c
hppa.c
m68k.c
meson.build mips: Always include nanomips disassembler 2023-01-13 16:22:53 +01:00
microblaze.c
mips.c disas/mips: Fix branch displacement for BEQZC and BNEZC 2022-10-31 11:32:07 +01:00
nanomips.c disas/nanomips: Tidy read for 48-bit opcodes 2022-11-08 01:04:25 +01:00
nios2.c disas/nios2: Simplify endianess conversion 2021-10-22 18:07:30 +02:00
riscv.c Fix incorrect register name in disassembler for fmv,fabs,fneg instructions 2023-03-14 16:36:43 +10:00
sh4.c
sparc.c
xtensa.c