qemu/target/riscv/tcg
Daniel Henrique Barboza e7443334a8 target/riscv: move riscv_tcg_ops to tcg-cpu.c
Move the remaining of riscv_tcg_ops now that we have a working realize()
implementation.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20230925175709.35696-5-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-10-12 11:59:03 +10:00
..
meson.build target/riscv: introduce TCG AccelCPUClass 2023-10-12 11:55:21 +10:00
tcg-cpu.c target/riscv: move riscv_tcg_ops to tcg-cpu.c 2023-10-12 11:59:03 +10:00
tcg-cpu.h target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.c 2023-10-12 11:57:46 +10:00