5b21b331be
Exposing the io_base offset as a QOM property not only allows it to be
configurable but also to be displayed in HMP:
Before:
(qemu) info qtree
...
dev: mc146818rtc, id ""
gpio-out "" 1
base_year = 0 (0x0)
irq = 8 (0x8)
lost_tick_policy = "discard"
After:
dev: mc146818rtc, id ""
gpio-out "" 1
base_year = 0 (0x0)
iobase = 112 (0x70)
irq = 8 (0x8)
lost_tick_policy = "discard"
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220529184006.10712-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
60 lines
1.4 KiB
C
60 lines
1.4 KiB
C
/*
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* QEMU MC146818 RTC emulation
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef HW_RTC_MC146818RTC_H
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#define HW_RTC_MC146818RTC_H
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#include "qapi/qapi-types-machine.h"
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#include "qemu/queue.h"
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#include "qemu/timer.h"
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#include "hw/isa/isa.h"
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#include "qom/object.h"
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#define TYPE_MC146818_RTC "mc146818rtc"
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OBJECT_DECLARE_SIMPLE_TYPE(RTCState, MC146818_RTC)
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struct RTCState {
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ISADevice parent_obj;
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MemoryRegion io;
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MemoryRegion coalesced_io;
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uint8_t cmos_data[128];
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uint8_t cmos_index;
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uint8_t isairq;
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uint16_t io_base;
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int32_t base_year;
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uint64_t base_rtc;
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uint64_t last_update;
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int64_t offset;
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qemu_irq irq;
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int it_shift;
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/* periodic timer */
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QEMUTimer *periodic_timer;
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int64_t next_periodic_time;
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/* update-ended timer */
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QEMUTimer *update_timer;
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uint64_t next_alarm_time;
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uint16_t irq_reinject_on_ack_count;
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uint32_t irq_coalesced;
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uint32_t period;
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QEMUTimer *coalesced_timer;
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Notifier clock_reset_notifier;
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LostTickPolicy lost_tick_policy;
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Notifier suspend_notifier;
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QLIST_ENTRY(RTCState) link;
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};
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#define RTC_ISA_IRQ 8
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ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
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qemu_irq intercept_irq);
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void rtc_set_memory(ISADevice *dev, int addr, int val);
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int rtc_get_memory(ISADevice *dev, int addr);
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#endif /* HW_RTC_MC146818RTC_H */
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