eaa3783b68
For system mode, we will need 64-bit virtual addresses even when we have 32-bit register sizes. Since the rest of QEMU equates TARGET_LONG_BITS with the address size, redefine everything related to register size in terms of a new TARGET_REGISTER_BITS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
124 lines
2.8 KiB
C
124 lines
2.8 KiB
C
/*
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* HPPA gdb server stub
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*
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* Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "exec/gdbstub.h"
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int hppa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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CPUHPPAState *env = &cpu->env;
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target_ureg val;
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switch (n) {
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case 0:
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val = cpu_hppa_get_psw(env);
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break;
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case 1 ... 31:
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val = env->gr[n];
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break;
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case 32:
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val = env->sar;
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break;
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case 33:
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val = env->iaoq_f;
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break;
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case 35:
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val = env->iaoq_b;
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break;
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case 59:
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val = env->cr26;
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break;
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case 60:
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val = env->cr27;
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break;
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case 64 ... 127:
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val = extract64(env->fr[(n - 64) / 2], (n & 1 ? 0 : 32), 32);
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break;
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default:
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if (n < 128) {
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val = 0;
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} else {
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return 0;
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}
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break;
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}
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if (TARGET_REGISTER_BITS == 64) {
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return gdb_get_reg64(mem_buf, val);
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} else {
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return gdb_get_reg32(mem_buf, val);
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}
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}
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int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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CPUHPPAState *env = &cpu->env;
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target_ureg val;
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if (TARGET_REGISTER_BITS == 64) {
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val = ldq_p(mem_buf);
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} else {
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val = ldl_p(mem_buf);
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}
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switch (n) {
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case 0:
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cpu_hppa_put_psw(env, val);
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break;
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case 1 ... 31:
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env->gr[n] = val;
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break;
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case 32:
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env->sar = val;
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break;
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case 33:
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env->iaoq_f = val;
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break;
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case 35:
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env->iaoq_b = val;
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break;
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case 59:
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env->cr26 = val;
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break;
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case 60:
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env->cr27 = val;
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break;
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case 64:
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env->fr[0] = deposit64(env->fr[0], 32, 32, val);
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cpu_hppa_loaded_fr0(env);
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break;
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case 65 ... 127:
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{
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uint64_t *fr = &env->fr[(n - 64) / 2];
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*fr = deposit64(*fr, val, (n & 1 ? 0 : 32), 32);
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}
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break;
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default:
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if (n >= 128) {
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return 0;
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}
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break;
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}
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return sizeof(target_ureg);
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}
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